Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp4745159ybv; Wed, 26 Feb 2020 02:24:19 -0800 (PST) X-Google-Smtp-Source: APXvYqxu/X9qjmILYw/9nbUP3AWGqtZha1UtjlcwWEECq3NtJqmvjblmYpT5uorPIxkxcnvilOJ+ X-Received: by 2002:a9d:5e18:: with SMTP id d24mr2536828oti.155.1582712659770; Wed, 26 Feb 2020 02:24:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1582712659; cv=none; d=google.com; s=arc-20160816; b=WpWFQPpgAKDPRSv2b7iXWc7wCX5dXP4Bee4+6ysjcWFj6DdS2QDQ9oKM3uqbXMUiMi 9+Mtq8v+vIQTonJcJae92ivb4K7Zp+KiJbuQVcLs0TofKUxZlob4PFkKckP8SKzqLxE/ pQ2NEEPVTmUB3sWuNTPWZc6LdcPjSo0o2pLfgMd89eRZXSRxDW3F20Cm7kF+uR3G8YMO B4UWtmK5UijuvI6qn/k7GzlT30fVqS47RmnN9BDev0RsgQX4eCVskc4fakHV+pNKlX2h 9dpXsgi85Gc6twHlUDlwVK7mNFPGwVzFuHPPeRMuxm3P/gT5CTW0wzgPj/XwBkgtiBQt WMAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=bZ1JUua9APRhfZDMKYHcDjkIapk/9Y+X+XMJEoTeJUc=; b=Sk7AyO4fKddYC1EAQ+OMCbYiOkhRxBDoTzDOPXaNDoSz+EipBqT5mHrL1dRwaBdny3 SzQN2Lvd9iVrSlnX8EoCnWqCFJPcw6ZiEs/JesSBB+tjPk9EzOq62SFE7EfBxEe1xXWS hBDGglAhdVn8rsfCsVsy3O047xDIG0gvoyjdZbqSHpGwj3q5kNv3HcaITwTgxMTQbLuA 6/fV47h3diRgeSBbLrrj78QEEOt1gisWwW6/1srYhvDXld0oua+H7KnJs/lmnGhc8ZjL zBrlRSsMN74R0ixVNqEskkIapEzYSIqUZp4AUpv2ONMHGVtkY+dcexzhl9k74EaxtkbF H+aA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m5si872134oie.240.2020.02.26.02.24.08; Wed, 26 Feb 2020 02:24:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727686AbgBZKXD (ORCPT + 99 others); Wed, 26 Feb 2020 05:23:03 -0500 Received: from foss.arm.com ([217.140.110.172]:33366 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726057AbgBZKXD (ORCPT ); Wed, 26 Feb 2020 05:23:03 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3F9101FB; Wed, 26 Feb 2020 02:23:02 -0800 (PST) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0BF1D3F9E6; Wed, 26 Feb 2020 02:23:00 -0800 (PST) Date: Wed, 26 Feb 2020 10:22:55 +0000 From: Lorenzo Pieralisi To: Bjorn Andersson Cc: Stanimir Varbanov , Andrew Murray , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Marc Gonzalez , stable@vger.kernel.org Subject: Re: [PATCH v2] PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM Message-ID: <20200226102255.GA13830@e121166-lin.cambridge.arm.com> References: <20191227012717.78965-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191227012717.78965-1-bjorn.andersson@linaro.org> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Dec 26, 2019 at 05:27:17PM -0800, Bjorn Andersson wrote: > There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit > the fixup to only affect the relevant PCIe bridges. > > Cc: stable@vger.kernel.org Hi Bjorn, to simplify stable's merging, would you mind helping me with the stable releases you want this patch to apply to please ? I will apply it then. Thanks, Lorenzo > Signed-off-by: Bjorn Andersson > --- > > Stan, I picked up all the suggested device id's from the previous thread and > added 0x1000 for QCS404. I looked at creating platform specific defines in > pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would > prefer that I do this anyway. > > drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 5ea527a6bd9f..138e1a2d21cc 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev) > { > dev->class = PCI_CLASS_BRIDGE_PCI << 8; > } > -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class); > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class); > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class); > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class); > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class); > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class); > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class); > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class); > > static struct platform_driver qcom_pcie_driver = { > .probe = qcom_pcie_probe, > -- > 2.24.0 >