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This also changes the error message to incidate ADC full scale value error as opposed to the Mic bias. Reported-by: Ricard Wanderlof Signed-off-by: Dan Murphy --- sound/soc/codecs/tlv320adcx140.c | 12 ++++++------ sound/soc/codecs/tlv320adcx140.h | 8 ++++---- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/tlv320adcx140.c b/sound/soc/codecs/tlv320adcx140.c index 93a0cb8e662c..825ace9b5fa7 100644 --- a/sound/soc/codecs/tlv320adcx140.c +++ b/sound/soc/codecs/tlv320adcx140.c @@ -758,12 +758,12 @@ static int adcx140_codec_probe(struct snd_soc_component *component) ret = device_property_read_u8(adcx140->dev, "ti,vref-source", &vref_source); if (ret) - vref_source = ADCX140_MIC_BIAS_VREF_275V; + vref_source = ADCX140_ADC_FSCALE_VREF_275V; - if (vref_source != ADCX140_MIC_BIAS_VREF_275V && - vref_source != ADCX140_MIC_BIAS_VREF_25V && - vref_source != ADCX140_MIC_BIAS_VREF_1375V) { - dev_err(adcx140->dev, "Mic Bias source value is invalid\n"); + if (vref_source != ADCX140_ADC_FSCALE_VREF_275V && + vref_source != ADCX140_ADC_FSCALE_VREF_25V && + vref_source != ADCX140_ADC_FSCALE_VREF_1375V) { + dev_err(adcx140->dev, "ADC full scale setting is invalid\n"); return -EINVAL; } @@ -787,7 +787,7 @@ static int adcx140_codec_probe(struct snd_soc_component *component) ret = regmap_update_bits(adcx140->regmap, ADCX140_BIAS_CFG, ADCX140_MIC_BIAS_VAL_MSK | - ADCX140_MIC_BIAS_VREF_MSK, bias_source); + ADCX140_ADC_FSCALE_VREF_MSK, bias_source); if (ret) dev_err(adcx140->dev, "setting MIC bias failed %d\n", ret); out: diff --git a/sound/soc/codecs/tlv320adcx140.h b/sound/soc/codecs/tlv320adcx140.h index 6d055e55909e..adb9513900b1 100644 --- a/sound/soc/codecs/tlv320adcx140.h +++ b/sound/soc/codecs/tlv320adcx140.h @@ -117,10 +117,10 @@ #define ADCX140_MIC_BIAS_VAL_AVDD 6 #define ADCX140_MIC_BIAS_VAL_MSK GENMASK(6, 4) -#define ADCX140_MIC_BIAS_VREF_275V 0 -#define ADCX140_MIC_BIAS_VREF_25V 1 -#define ADCX140_MIC_BIAS_VREF_1375V 2 -#define ADCX140_MIC_BIAS_VREF_MSK GENMASK(1, 0) +#define ADCX140_ADC_FSCALE_VREF_275V 0 +#define ADCX140_ADC_FSCALE_VREF_25V 1 +#define ADCX140_ADC_FSCALE_VREF_1375V 2 +#define ADCX140_ADC_FSCALE_VREF_MSK GENMASK(1, 0) #define ADCX140_PWR_CFG_BIAS_PDZ BIT(7) #define ADCX140_PWR_CFG_ADC_PDZ BIT(6) -- 2.25.0