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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id w202sm931951oiw.0.2020.02.26.07.42.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2020 07:42:28 -0800 (PST) Received: (nullmailer pid 23994 invoked by uid 1000); Wed, 26 Feb 2020 15:42:27 -0000 Date: Wed, 26 Feb 2020 09:42:27 -0600 From: Rob Herring To: Ansuel Smith Cc: Sricharan R , Andy Gross , Bjorn Andersson , Ilia Lin , Viresh Kumar , Nishanth Menon , Stephen Boyd , Mark Rutland , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] cpufreq: qcom: Add support for krait based socs Message-ID: <20200226154227.GA22249@bogus> References: <20200219205546.6800-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200219205546.6800-1-ansuelsmth@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 19, 2020 at 09:55:45PM +0100, Ansuel Smith wrote: > In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974 > that has KRAIT processors the voltage/current value of each OPP > varies based on the silicon variant in use. > > The required OPP related data is determined based on > the efuse value. This is similar to the existing code for > kryo cores. So adding support for krait cores here. > > Signed-off-by: Sricharan R > Signed-off-by: Ansuel Smith > --- > .../bindings/opp/qcom-nvmem-cpufreq.txt | 3 +- If you respin, please split bindings to a separate patch. > drivers/cpufreq/Kconfig.arm | 2 +- > drivers/cpufreq/cpufreq-dt-platdev.c | 5 + > drivers/cpufreq/qcom-cpufreq-nvmem.c | 181 ++++++++++++++++-- > 4 files changed, 173 insertions(+), 18 deletions(-) >