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[209.132.180.67]) by mx.google.com with ESMTP id z2si253925oix.100.2020.02.26.13.56.08; Wed, 26 Feb 2020 13:56:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=SvafYS8f; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727695AbgBZVyp (ORCPT + 99 others); Wed, 26 Feb 2020 16:54:45 -0500 Received: from mail-il1-f193.google.com ([209.85.166.193]:40364 "EHLO mail-il1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727503AbgBZVyp (ORCPT ); Wed, 26 Feb 2020 16:54:45 -0500 Received: by mail-il1-f193.google.com with SMTP id i7so522807ilr.7 for ; Wed, 26 Feb 2020 13:54:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=4XwFC9zK7rdNFiU4fD2W53gqKQJ5N1hfb8kc+66F6nM=; b=SvafYS8fran1hLSVtvbh3r5bGn9MzewnRSIACfZVF83EuMq+8JQ2qXCJGEy/RugvH7 xgC5MCs552la8bmpl3KUvf6vUB4Feze2tFO2bpsvCclTJ4Cd/2CycNNRYgEwuXR0AIgC lxHNybkmt0URMPWz4GYWI7kjO9jUYGP/SkmQgUMZqrQ4GDuDIuRu480/ebLy16QPM35Z Dc8rHwFPEHi0DeDyj7OYodMFWLHz8TcFWYtnhu6ogg9yV8iATTLG6iRp8C1ZAlHmWfhm 60DCHpJGKkRY+eSSutwV/dwEebDwafmfm/rQhi9h3uiilQ2tQJF5HLyh0YSyks1AIs9H 5+PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=4XwFC9zK7rdNFiU4fD2W53gqKQJ5N1hfb8kc+66F6nM=; b=DoJTtGe7gcO4+VFbPITe3Yr1OlNq+GYUUseSggMVmaVs/LHYvYchrN9Q9fXP0Er+tV XHJDKv6cMCJBHDpUTyHWcKBz1QeyORMo0bx0EDwK2MrqeEAT2CmrDkMV3O7xOJaBm6q3 TaXJSZ20BFKZ33B9YHSfCT/0R5xNej60RhycHC3P9K+Rd/QDntsHt7iSLpwPFWm0P6gA BA0vez54LhzRxpye8dpVy4zXFd1Av2bm6/m95SNa1UtjVs1dz3Pro/4TESTic0FmV44R L2sS4dmr3C2mm9/qI00eaZoHLgeMSi6iFGgO2X29o1fihX423E2J56KyFvADCEy96bik 64FQ== X-Gm-Message-State: APjAAAU+VoNKb7b749tx0oOsw/LzJDrC+nWbTPTrVPUObl12nFdqlwdc pKpwCpt3xJoHV46XXT0GwO1N02aFcvwt3BAH8w== X-Received: by 2002:a05:6e02:1014:: with SMTP id n20mr1047518ilj.172.1582754084409; Wed, 26 Feb 2020 13:54:44 -0800 (PST) MIME-Version: 1.0 References: <20200225224719.950376311@linutronix.de> <20200225231609.000955823@linutronix.de> <87k149p0na.fsf@nanos.tec.linutronix.de> In-Reply-To: <87k149p0na.fsf@nanos.tec.linutronix.de> From: Brian Gerst Date: Wed, 26 Feb 2020 16:54:33 -0500 Message-ID: Subject: Re: [patch 01/15] x86/irq: Convey vector as argument and not in ptregs To: Thomas Gleixner Cc: LKML , "the arch/x86 maintainers" , Steven Rostedt , Juergen Gross , Paolo Bonzini , Arnd Bergmann Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 26, 2020 at 3:13 PM Thomas Gleixner wrote: > > Brian Gerst writes: > > > On Tue, Feb 25, 2020 at 6:26 PM Thomas Gleixner wrote: > >> > >> Device interrupts which go through do_IRQ() or the spurious interrupt > >> handler have their separate entry code on 64 bit for no good reason. > >> > >> Both 32 and 64 bit transport the vector number through ORIG_[RE]AX in > >> pt_regs. Further the vector number is forced to fit into an u8 and is > >> complemented and offset by 0x80 for historical reasons. > > > > The reason for the 0x80 offset is so that the push instruction only > > takes two bytes. This allows each entry stub to be packed into a > > fixed 8 bytes. idt_setup_apic_and_irq_gates() assumes this 8-byte > > fixed length for the stubs, so now every odd vector after 0x80 is > > broken. > > > > 508: 6a 7f pushq $0x7f > > 50a: e9 f1 08 00 00 jmpq e00 > > 50f: 90 nop > > 510: 68 80 00 00 00 pushq $0x80 > > 515: e9 e6 08 00 00 jmpq e00 > > 51a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1) > > 520: 68 81 00 00 00 pushq $0x81 > > 525: e9 d6 08 00 00 jmpq e00 > > 52a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1) > > > > The 0x81 vector should start at 0x518, not 0x520. > > Bah, I somehow missed that big fat comment explaining it. :) > > Thanks for catching it. So my testing just has been lucky to not hit one > of those. > > Now the question is whether we care about the packed stubs or just make > them larger by using alignment to get rid of this silly +0x80 and > ~vector fixup later on. The straight forward thing clearly has its charm > and I doubt it matters in measurable ways. I think we can get rid of the inversion. That was done so orig_ax had a negative number (signifying it's not a syscall), but if you replace it with -1 that isn't necessary. A simple -0x80 offset should be sufficient. I think it's a worthy optimization to keep. There are 240 of these stubs, so increasing the allocation to 16 bytes would add 1920 bytes to the kernel text. -- Brian Gerst