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[209.132.180.67]) by mx.google.com with ESMTP id t20si329856oih.70.2020.02.26.15.27.54; Wed, 26 Feb 2020 15:28:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727983AbgBZX1b (ORCPT + 99 others); Wed, 26 Feb 2020 18:27:31 -0500 Received: from Galois.linutronix.de ([193.142.43.55]:60796 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726413AbgBZX1a (ORCPT ); Wed, 26 Feb 2020 18:27:30 -0500 Received: from p5de0bf0b.dip0.t-ipconnect.de ([93.224.191.11] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1j7651-00008W-8B; Thu, 27 Feb 2020 00:27:03 +0100 Received: by nanos.tec.linutronix.de (Postfix, from userid 1000) id BB201100EA1; Thu, 27 Feb 2020 00:27:02 +0100 (CET) From: Thomas Gleixner To: Peter Zijlstra , Prarit Bhargava Cc: linux-kernel@vger.kernel.org, Patrick Geary , Jonathan Corbet , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , x86@kernel.org, Mauro Carvalho Chehab , Josh Poimboeuf , Andrew Morton , Pawan Gupta , Juergen Gross , "Rafael J. Wysocki" , Viresh Kumar , Daniel Drake , Michael Zhivich , linux-doc@vger.kernel.org Subject: Re: [PATCH] x86/tsc: Add kernel options to disable CPUID and MSR calibrations In-Reply-To: <20200226165407.GB18400@hirez.programming.kicks-ass.net> References: <20200226164308.14468-1-prarit@redhat.com> <20200226165407.GB18400@hirez.programming.kicks-ass.net> Date: Thu, 27 Feb 2020 00:27:02 +0100 Message-ID: <87k149nd4p.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Peter Zijlstra writes: > On Wed, Feb 26, 2020 at 11:43:08AM -0500, Prarit Bhargava wrote: >> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt >> index dbc22d684627..0316aadfff08 100644 >> --- a/Documentation/admin-guide/kernel-parameters.txt >> +++ b/Documentation/admin-guide/kernel-parameters.txt >> @@ -4942,7 +4942,7 @@ >> See Documentation/admin-guide/mm/transhuge.rst >> for more details. >> >> - tsc= Disable clocksource stability checks for TSC. >> + tsc=option[,option...] Various TSC options. >> Format: >> [x86] reliable: mark tsc clocksource as reliable, this >> disables clocksource verification at runtime, as well >> @@ -4960,6 +4960,12 @@ >> in situations with strict latency requirements (where >> interruptions from clocksource watchdog are not >> acceptable). >> + [x86] no_cpuid_calibration: Disable the CPUID TSC >> + calibration. Used in situations where the CPUID >> + TSC khz does not match the actual CPU TSC khz >> + [x86] no_msr_calibration: Disable the MSR TSC >> + calibration. Used in situations where the MSR >> + TSC khz does not match the actual CPU TSC khz. > > Do we want to mention that these situations are mostly broken firmware? > Also do mention that if you disable these you might not boot due to not > having a PIT/HPET at all? Right. Same discussion as before. Also why do we want no_cpuid_calibration and no_msr_calibration? How should Joe User figure out which one to use? This does not make sense. The point is that the BIOS/Firmware supplied value in system registers is bogus. So something like "skip_firmware_calibration" might be better suitable. Aside of that this really wants to be combined with the ability to supply the actual frequency on the command line as I suggested in the other thread to cope with machines which do not expose PIT/HPET or have broken variants of them. Thanks, tglx