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[209.132.180.67]) by mx.google.com with ESMTP id a6si1202613oia.33.2020.02.27.03.54.32; Thu, 27 Feb 2020 03:54:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728927AbgB0LxN convert rfc822-to-8bit (ORCPT + 99 others); Thu, 27 Feb 2020 06:53:13 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:44609 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728908AbgB0LxM (ORCPT ); Thu, 27 Feb 2020 06:53:12 -0500 Received: from lupine.hi.pengutronix.de ([2001:67c:670:100:3ad5:47ff:feaf:1a17] helo=lupine) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1j7Hj0-0003fl-HA; Thu, 27 Feb 2020 12:53:06 +0100 Received: from pza by lupine with local (Exim 4.92) (envelope-from ) id 1j7His-00068v-Qd; Thu, 27 Feb 2020 12:52:58 +0100 Message-ID: Subject: Re: [PATCH v3 3/4] dt-bindings: display: imx: add bindings for DCSS From: Philipp Zabel To: Laurentiu Palcu , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, agx@sigxcpu.org, lukas@mntmn.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, l.stach@pengutronix.de Date: Thu, 27 Feb 2020 12:52:58 +0100 In-Reply-To: <1575625964-27102-4-git-send-email-laurentiu.palcu@nxp.com> References: <1575625964-27102-1-git-send-email-laurentiu.palcu@nxp.com> <1575625964-27102-4-git-send-email-laurentiu.palcu@nxp.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT User-Agent: Evolution 3.30.5-1.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:3ad5:47ff:feaf:1a17 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Laurentiu, On Fri, 2019-12-06 at 11:52 +0200, Laurentiu Palcu wrote: > Add bindings for iMX8MQ Display Controller Subsystem. > > Signed-off-by: Laurentiu Palcu > Reviewed-by: Rob Herring > --- > .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 86 ++++++++++++++++++++++ > 1 file changed, 86 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml > > diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml > new file mode 100644 > index 00000000..efd2494 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml > @@ -0,0 +1,86 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2019 NXP > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: iMX8MQ Display Controller Subsystem (DCSS) > + > +maintainers: > + - Laurentiu Palcu > + > +description: > + > + The DCSS (display controller sub system) is used to source up to three > + display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP > + 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 > + image processing capabilities are included to provide a solution capable of > + driving next generation high dynamic range displays. > + > +properties: > + compatible: > + const: nxp,imx8mq-dcss > + > + reg: > + maxItems: 2 > + > + interrupts: > + maxItems: 3 > + items: > + - description: Context loader completion and error interrupt > + - description: DTG interrupt used to signal context loader trigger time > + - description: DTG interrupt for Vblank > + > + interrupt-names: > + maxItems: 3 > + items: > + - const: ctx_ld > + - const: ctxld_kick > + - const: vblank > + > + clocks: > + maxItems: 5 > + items: > + - description: Display APB clock for all peripheral PIO access interfaces > + - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL > + - description: RTRAM clock > + - description: Pixel clock, can be driver either by HDMI phy clock or MIPI > + - description: DTRC clock, needed by video decompressor > + > + clock-names: > + items: > + - const: apb > + - const: axi > + - const: rtrm > + - const: pix > + - const: dtrc > + > + port@0: If there is just a single output port, I think the @0 unit address should be dropped. Otherwise the port node needs to contain a "reg = <0>;" property in the example below: > + type: object > + description: A port node pointing to a hdmi_in or mipi_in port node. > + > +examples: > + - | > + dcss: display-controller@32e00000 { > + #address-cells = <1>; > + #size-cells = <0>; /soc@0/bus@32c00000/display-controller@32e00000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property > + compatible = "nxp,imx8mq-dcss"; > + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; > + interrupts = <6>, <8>, <9>; > + interrupt-names = "ctx_ld", "ctxld_kick", "vblank"; > + interrupt-parent = <&irqsteer>; > + clocks = <&clk 248>, <&clk 247>, <&clk 249>, > + <&clk 254>,<&clk 122>; > + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; > + assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>; > + assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>; > + assigned-clock-rates = <800000000>, > + <400000000>; > + port@0 { /soc@0/bus@32c00000/display-controller@32e00000/port@0: node has a unit name, but no reg property regards Philipp