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Date:   Thu, 27 Feb 2020 16:22:40 -0600
From:   Rob Herring <robh@kernel.org>
To:     Andre Przywara <andre.przywara@arm.com>
Cc:     linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, Maxime Ripard <mripard@kernel.org>,
        Robert Richter <rric@kernel.org>, soc@kernel.org,
        Jon Loeliger <jdl@jdl.com>,
        Mark Langsdorf <mlangsdo@redhat.com>,
        Eric Auger <eric.auger@redhat.com>,
        Will Deacon <will@kernel.org>,
        Catalin Marinas <catalin.marinas@arm.com>
Subject: Re: [PATCH v2 12/13] dt-bindings: arm: Add Calxeda system registers
 json-schema binding
Message-ID: <20200227222240.GG26010@bogus>
References: <20200227182210.89512-1-andre.przywara@arm.com>
 <20200227182210.89512-13-andre.przywara@arm.com>
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On Thu, Feb 27, 2020 at 06:22:09PM +0000, Andre Przywara wrote:
> The Calxeda system registers are a collection of MMIO register
> controlling several more general aspects of the SoC.
> Beside for some power management tasks this node is also somewhat
> abused as the container for the clock nodes.
> 
> Add a binding in DT schema format using json-schema.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../bindings/arm/calxeda/hb-sregs.yaml        | 49 +++++++++++++++++++
>  1 file changed, 49 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml b/Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml
> new file mode 100644
> index 000000000000..4753e8dc5873
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml
> @@ -0,0 +1,49 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license please.

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/calxeda/hb-sregs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Calxeda Highbank system registers
> +
> +description: |
> +  The Calxeda Highbank system has a block of MMIO registers controlling
> +  several generic system aspects. Those can be used to control some power
> +  management, they also contain some gate and PLL clocks.
> +
> +maintainers:
> +  - Andre Przywara <andre.przywara@arm.com>
> +
> +properties:
> +  compatible:
> +    const: calxeda,hb-sregs
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    type: object
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    sregs@fff3c000 {
> +        compatible = "calxeda,hb-sregs";
> +        reg = <0xfff3c000 0x1000>;
> +
> +        clocks {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +
> +            osc: oscillator {
> +                #clock-cells = <0>;
> +                compatible = "fixed-clock";
> +                clock-frequency = <33333000>;
> +            };
> +        };
> +    };
> -- 
> 2.17.1
>