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Date:   Fri, 28 Feb 2020 08:46:51 +0100
From:   Boris Brezillon <boris.brezillon@collabora.com>
To:     "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@linux.intel.com>
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Subject: Re: [PATCH v11 2/2] spi: cadence-quadspi: Add support for the
 Cadence QSPI controller
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On Fri, 28 Feb 2020 12:11:09 +0800
"Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@linux.intel.com> wrote:

> Hi Boris,
> 
>       Thank you so much for the review comments...
> 
> On 28/2/2020 1:30 AM, Boris Brezillon wrote:
> > On Thu, 27 Feb 2020 14:27:08 +0800
> > "Ramuthevar, Vadivel MuruganX"
> > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
> >  
> >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> >>
> >> Add support for the Cadence QSPI controller. This controller is
> >> present in the Intel Lightning Mountain(LGM) SoCs, Altera and TI SoCs.
> >> This driver has been tested on the Intel LGM SoCs.
> >>
> >> This driver does not support generic SPI and also the implementation
> >> only supports spi-mem interface to replace the existing driver in
> >> mtd/spi-nor/cadence-quadspi.c, the existing driver only support SPI-NOR
> >> flash memory  
> > Is it really supporting SPI NORs only, or is it just that you only
> > tested it with a spi-nor?  
> 
> The existing drivers/mtd/spi-nor/cadence-quadspi.c supports SPI-NORs 
> only, because the driver is developed
> 
> such a way that it does not support other SPI based flash memories, also 
> never uses SPI/SPI-MEM based framework.
> 
> So we Vignesh suggested me to  develop the new driver which supports 
> both SPI-NOR and SPI-NAND based on the SPI-MEM framework.

Hm, your commit message makes it sound like even the new driver isn't
generic enough to support SPI NANDs. Maybe there's something to improve
to clarify the fact that this new version is not limited to SPI NORs.