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[209.132.180.67]) by mx.google.com with ESMTP id w9si1948051otl.138.2020.02.28.08.01.04; Fri, 28 Feb 2020 08:01:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@me.com header.s=1a1hai header.b=ddn28xO3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=me.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727158AbgB1QAu (ORCPT + 99 others); Fri, 28 Feb 2020 11:00:50 -0500 Received: from st43p00im-ztdg10073201.me.com ([17.58.63.177]:44507 "EHLO st43p00im-ztdg10073201.me.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727110AbgB1QAu (ORCPT ); Fri, 28 Feb 2020 11:00:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=me.com; s=1a1hai; t=1582905648; bh=Jp5Jx4TT3jU6jf6tGENjtbuH3RdcUZ/t+syzDFb4508=; h=Date:From:To:Subject:Message-ID:Content-Type; b=ddn28xO36TnsDne0mn8CLJQ7TPSP9bzqJocPvW9t735IWgyMWsOPWmMem8EAioqZ+ IIkQkq+bSpy4gL/oQbGnsfIy6BbDleFxHaVqG7hoZS1BiKq1Bd5FO+OuuHjP7JYrmm 8no4hBawJeBuGNEjyUtTJVlzu26Q2HxoIz+lCjjIUZWJI2KEXpVQ/TVPYEwMgWwZS6 X0St9457hQlUpr43qJ1i1RD8nNmNryUhJVjVj452D2amLA3i/rydHQMzAPt9ZwRgMX lhYn55c78OaoRYcvBgjYB6NwwJHV5RwdFLCUDUO4SKnXzjIAGswsyJVYcw0FHo7fvE d7ZnSSBaq47tA== Received: from shwetrath.localdomain (unknown [66.199.8.131]) by st43p00im-ztdg10073201.me.com (Postfix) with ESMTPSA id B34E222214B; Fri, 28 Feb 2020 16:00:47 +0000 (UTC) Date: Fri, 28 Feb 2020 11:00:45 -0500 From: Vijay Thakkar To: Kim Phillips Cc: Arnaldo Carvalho de Melo , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Martin =?utf-8?B?TGnFoWth?= , Jon Grimm , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH v2 2/3] perf vendor events amd: add Zen2 events Message-ID: <20200228160045.GA23708@shwetrath.localdomain> References: <20200225192815.50388-1-vijaythakkar@me.com> <20200225192815.50388-3-vijaythakkar@me.com> <6f2a1097-a656-8226-1be3-36a337539412@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <6f2a1097-a656-8226-1be3-36a337539412@amd.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2020-02-28_05:,, signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-2002280127 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > + { > > + "EventName": "ls_pref_instr_disp.prefetch_nta", > > + "EventCode": "0x4b", > > + "BriefDescription": "Software Prefetch Instructions (PREFETCHNTA instruction) Dispatched.", > > + "PublicDescription": "Software Prefetch Instructions (PREFETCHNTA instruction) Dispatched.", > > + "UMask": "0x4" > > + }, > > + { > > + "EventName": "ls_pref_instr_disp.store_prefetch_w", > > + "EventCode": "0x4b", > > + "BriefDescription": "Software Prefetch Instructions (3DNow PREFETCHW instruction) Dispatched.", > > + "PublicDescription": "Software Prefetch Instructions (3DNow PREFETCHW instruction) Dispatched.", > > + "UMask": "0x2" > > + }, > > + { > > + "EventName": "ls_pref_instr_disp.load_prefetch_w", > > + "EventCode": "0x4b", > > + "BriefDescription": "Prefetch, Prefetch_T0_T1_T2.", > > + "PublicDescription": "Software Prefetch Instructions Dispatched. Prefetch, Prefetch_T0_T1_T2.", > > + "UMask": "0x1" > > + }, These three are present in the PPR for model 71h (56176 Rev 3.06 - Jul 17, 2019) but are missing from the PPR for model 31h (55803 Rev 0.54 - Sep 12, 2019). Not sure what to do about it. Similarly, PMC 0x0AF - Dispatch Resource Stall Cycles 0 only has one subcounter in the model 31h PPR, whereas the PPR for 71h is the one that contains the eight subcounters we see in the mainline right now. There could be more subtle differences like these, since I have not really compared the PPR versions that thoroughly. I was going with the assumption that since both are for SoCs based on the Zen2, they would have identical events. Otherwise, I have made all the other changes and corrections, and will send in v3 after you suggest how to proceed about the above two. Best, Vijay