Received: by 2002:a25:c205:0:0:0:0:0 with SMTP id s5csp999531ybf; Fri, 28 Feb 2020 11:47:59 -0800 (PST) X-Google-Smtp-Source: APXvYqwJU4Otm9Tme+lOC0ORqfaeyj0TZSrLXrweb1kiN0iy6/sFt97qXcpDd8gHFZ/qLepeatVr X-Received: by 2002:aca:fc0c:: with SMTP id a12mr4226925oii.118.1582919279294; Fri, 28 Feb 2020 11:47:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1582919279; cv=none; d=google.com; s=arc-20160816; b=Axpn2kq3hhdfd38rh3XiKkayuLkGVd8oL1oyzn2hu7fMn65DJPfDlOVynjEBE+jKum WkaOSmb3xXDIK/qPCS6OBSWadthOvbXAK3LunPdrnkJafqZwHyz79OACVbWWe2DPgLUf ww7rj5iEeJQoxE4xICh49zWEH/v059QE0rnJmME+PAd3VqwKuM1Fz9HFDDwhKGE2rlns 0ojmmza4tdLOJj5pVzTYYmRZiaPqUxKX9OltXdSDkPip7YTXAC/ZtvdxqL16+7kqKudh 1tyG2Ok3r8zoce5Xw7u/reD93kq5UqtdA/dVBbjbN778U1r+0eGHoCFGsmGyBcipaTP1 /08w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=zaIJozlrAB+/UcGnTqp2XnV40gjMYn9rMLnYyyQ8tGM=; b=M+Hs5tOK8lrPPn4NedQrAuRXyJAg+S2fiWJAn06y9zFTUBpODASywyQU8IzXgEVMHn hLwXE9IyVDH8NDRrqVBMBeQREyrdmR4q4PcoaVgLNrJ2jebiPpl8VBC2AEt447O+S/z9 Uz2OHNtTlKLqcDjaLmbVmwLk4vVtYmLlCMtNmjp/wVmfphEBRMAHwW67I9Nqwk7BKa+V qcryV6ICCweOmvNbz8eNWwIzOmZzCN1Jyi1XuRGyeh0/rzZS+56sHtZW2o8Vm++wWqyz Ai4FH8d+UvPUqjCnG//MbAz2jqSCg9KBLU32yN86nNxgIGU3AIa+2TaZPdfxZog28+Oy vfYw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e22si2598078oiy.124.2020.02.28.11.47.46; Fri, 28 Feb 2020 11:47:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726809AbgB1TqR (ORCPT + 99 others); Fri, 28 Feb 2020 14:46:17 -0500 Received: from lists.gateworks.com ([108.161.130.12]:55899 "EHLO lists.gateworks.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725730AbgB1TqR (ORCPT ); Fri, 28 Feb 2020 14:46:17 -0500 Received: from 68-189-91-139.static.snlo.ca.charter.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by lists.gateworks.com with esmtp (Exim 4.82) (envelope-from ) id 1j7lbO-0005Rf-VP; Fri, 28 Feb 2020 19:47:15 +0000 From: Tim Harvey To: Shawn Guo , Sascha Hauer Cc: Mark Rutland , Rob Herring , Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , Tim Harvey Subject: [PATCH] ARM: dts: imx6qdl-gw5910: add CC1352 UART Date: Fri, 28 Feb 2020 11:46:07 -0800 Message-Id: <1582919167-28690-1-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The GW5910-C revision adds a TI CC1352 connected to IMX UART4 Signed-off-by: Tim Harvey --- arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi index be1af74..30fe47f 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi @@ -220,6 +220,14 @@ status = "okay"; }; +/* cc1352 */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + /* Sterling-LWB Bluetooth */ &uart4 { pinctrl-names = "default"; @@ -411,6 +419,23 @@ >; }; + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x4001b0b1 /* DIO20 */ + MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x4001b0b1 /* DIO14 */ + MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x4001b0b1 /* DIO15 */ + MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b1 /* TMS */ + MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b1 /* TCK */ + MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b1 /* TDO */ + MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b1 /* TDI */ + MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x4001b0b1 /* RST# */ + >; + }; + pinctrl_uart4: uart4grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 -- 2.7.4