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[209.85.167.50]) by smtp.gmail.com with ESMTPSA id r12sm6718403ljh.105.2020.02.28.16.10.53 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Feb 2020 16:10:53 -0800 (PST) Received: by mail-lf1-f50.google.com with SMTP id c23so3380970lfi.7 for ; Fri, 28 Feb 2020 16:10:53 -0800 (PST) X-Received: by 2002:a19:8585:: with SMTP id h127mr3874662lfd.196.1582935052501; Fri, 28 Feb 2020 16:10:52 -0800 (PST) MIME-Version: 1.0 References: <20200227105632.15041-1-sibis@codeaurora.org> <20200227105632.15041-4-sibis@codeaurora.org> In-Reply-To: <20200227105632.15041-4-sibis@codeaurora.org> From: Evan Green Date: Fri, 28 Feb 2020 16:10:15 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v5 3/7] interconnect: qcom: Add OSM L3 interconnect provider support To: Sibi Sankar Cc: Rob Herring , Georgi Djakov , Bjorn Andersson , Andy Gross , LKML , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm , Mark Rutland , Saravana Kannan , Viresh Kumar , Odelu Kukatla Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 27, 2020 at 2:57 AM Sibi Sankar wrote: > > On some Qualcomm SoCs, Operating State Manager (OSM) controls the > resources of scaling L3 caches. Add a driver to handle bandwidth > requests to OSM L3 from CPU on SDM845 SoCs. > > Signed-off-by: Sibi Sankar Reviewed-by: Evan Green