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From:   Avri Altman <Avri.Altman@wdc.com>
To:     Dmitry Osipenko <digetx@gmail.com>, Jens Axboe <axboe@kernel.dk>,
        Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
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Subject: RE: [PATCH v1 1/3] mmc: core: Add raw_boot_mult field to mmc_ext_csd
Thread-Topic: [PATCH v1 1/3] mmc: core: Add raw_boot_mult field to mmc_ext_csd
Thread-Index: AQHV62lMjgFqnDamZECwOoicj2ncZ6gzlnYA
Date:   Sun, 1 Mar 2020 10:50:35 +0000
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 <20200224231841.26550-2-digetx@gmail.com>
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Hi,
>=20
>=20
> In order to support parsing of NVIDIA Tegra Partition Table format, we
> need to know the BOOT_SIZE_MULT value of the Extended CSD register
> because
> NVIDIA's bootloader linearizes the boot0/boot1/main partitions into a
> single virtual space, and thus, all partition addresses are shifted by
> the size of boot0 + boot1 partitions.
>=20
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  drivers/mmc/core/mmc.c   | 2 ++
>  include/linux/mmc/card.h | 1 +
>  2 files changed, 3 insertions(+)
>=20
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index f6912ded652d..88e5b4224d3c 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -417,6 +417,8 @@ static int mmc_decode_ext_csd(struct mmc_card
> *card, u8 *ext_csd)
>                 ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT];
>         card->ext_csd.raw_hc_erase_grp_size =3D
>                 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
> +       card->ext_csd.raw_boot_mult =3D
> +               ext_csd[EXT_CSD_BOOT_MULT];
You might want at this point multiply it by 128K,
And get rid of: part_size =3D ext_csd[EXT_CSD_BOOT_MULT] << 17;
Below...

Thanks,
Avri