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[79.139.233.37]) by smtp.googlemail.com with ESMTPSA id f14sm9401803lfh.40.2020.03.01.15.09.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 01 Mar 2020 15:09:09 -0800 (PST) Subject: Re: [PATCH v1 1/3] mmc: core: Add raw_boot_mult field to mmc_ext_csd To: Avri Altman , Jens Axboe , Thierry Reding , Jonathan Hunter , =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= , David Heidelberg , Peter Geis , Stephen Warren , Nicolas Chauvet , Ulf Hansson , Adrian Hunter , Billy Laws Cc: "linux-tegra@vger.kernel.org" , "linux-block@vger.kernel.org" , Andrey Danin , Gilles Grandou , Ryan Grachek , "linux-mmc@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <20200224231841.26550-1-digetx@gmail.com> <20200224231841.26550-2-digetx@gmail.com> From: Dmitry Osipenko Message-ID: <0fb5f6ec-8aa0-3bc8-e6cc-8e061c401839@gmail.com> Date: Mon, 2 Mar 2020 02:09:08 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 01.03.2020 13:50, Avri Altman пишет: > Hi, >> >> >> In order to support parsing of NVIDIA Tegra Partition Table format, we >> need to know the BOOT_SIZE_MULT value of the Extended CSD register >> because >> NVIDIA's bootloader linearizes the boot0/boot1/main partitions into a >> single virtual space, and thus, all partition addresses are shifted by >> the size of boot0 + boot1 partitions. >> >> Signed-off-by: Dmitry Osipenko >> --- >> drivers/mmc/core/mmc.c | 2 ++ >> include/linux/mmc/card.h | 1 + >> 2 files changed, 3 insertions(+) >> >> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c >> index f6912ded652d..88e5b4224d3c 100644 >> --- a/drivers/mmc/core/mmc.c >> +++ b/drivers/mmc/core/mmc.c >> @@ -417,6 +417,8 @@ static int mmc_decode_ext_csd(struct mmc_card >> *card, u8 *ext_csd) >> ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]; >> card->ext_csd.raw_hc_erase_grp_size = >> ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; >> + card->ext_csd.raw_boot_mult = >> + ext_csd[EXT_CSD_BOOT_MULT]; > You might want at this point multiply it by 128K, > And get rid of: part_size = ext_csd[EXT_CSD_BOOT_MULT] << 17; > Below... But it's not a *raw* _boot_mult anymore then. I'm not sure that it will be a worthwhile change.