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From:   Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Date:   Tue, 3 Mar 2020 08:50:28 -0700
Message-ID: <CAOCk7NpP8chviZ0eM_4Fm3b2Jn+ngtVq=EYB=7yMK0H7rnfWMg@mail.gmail.com>
Subject: Re: [Freedreno] [PATCH v3 1/2] dt-bindings: display: msm: Convert GMU
 bindings to YAML
To:     Sam Ravnborg <sam@ravnborg.org>, Sean Paul <sean@poorly.run>,
        DTML <devicetree@vger.kernel.org>,
        David Airlie <airlied@linux.ie>,
        MSM <linux-arm-msm@vger.kernel.org>,
        Sharat Masetty <smasetty@codeaurora.org>,
        lkml <linux-kernel@vger.kernel.org>,
        "open list:DRM PANEL DRIVERS" <dri-devel@lists.freedesktop.org>,
        Rob Herring <robh+dt@kernel.org>,
        freedreno <freedreno@lists.freedesktop.org>,
        Brian Masney <masneyb@onstation.org>
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On Tue, Mar 3, 2020 at 8:43 AM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> On Mon, Mar 02, 2020 at 09:49:06PM +0100, Sam Ravnborg wrote:
> > Hi Jordan.
> >
> > On Mon, Mar 02, 2020 at 11:23:43AM -0700, Jordan Crouse wrote:
> > > Convert display/msm/gmu.txt to display/msm/gmu.yaml and remove the old
> > > text bindings.
> > >
> > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> > > ---
> > >
> > >  .../devicetree/bindings/display/msm/gmu.txt        | 116 -------------------
> > > -
> > > -Required properties:
> > > -- compatible: "qcom,adreno-gmu-XYZ.W", "qcom,adreno-gmu"
> > > -    for example: "qcom,adreno-gmu-630.2", "qcom,adreno-gmu"
> > > -  Note that you need to list the less specific "qcom,adreno-gmu"
> > > -  for generic matches and the more specific identifier to identify
> > > -  the specific device.
> > > -- reg: Physical base address and length of the GMU registers.
> > > -- reg-names: Matching names for the register regions
> > > -  * "gmu"
> > > -  * "gmu_pdc"
> > > -  * "gmu_pdc_seg"
> > > -- interrupts: The interrupt signals from the GMU.
> > > -- interrupt-names: Matching names for the interrupts
> > > -  * "hfi"
> > > -  * "gmu"
> > > -- clocks: phandles to the device clocks
> > > -- clock-names: Matching names for the clocks
> > > -   * "gmu"
> > > -   * "cxo"
> > > -   * "axi"
> > > -   * "mnoc"
> > The new binding - and arch/arm64/boot/dts/qcom/sdm845.dtsi agrees that
> > "mnoc" is wrong.
> >
> > > -- power-domains: should be:
> > > -   <&clock_gpucc GPU_CX_GDSC>
> > > -   <&clock_gpucc GPU_GX_GDSC>
> > > -- power-domain-names: Matching names for the power domains
> > > -- iommus: phandle to the adreno iommu
> > > -- operating-points-v2: phandle to the OPP operating points
> > > -
> > > -Optional properties:
> > > -- sram: phandle to the On Chip Memory (OCMEM) that's present on some Snapdragon
> > > -        SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml.
> > This property is not included in the new binding.
>
> Yeah, that guy shouldn't be here. I'm not sure how it got there in the first
> place but I'll update the commit log. Thanks for the poke.

I thought this was something Brian M added for older targets (A4XX?).
Perhaps he should chime in?

>
> Jordan
>
> > Everything else looked fine to me.
> > With sram added - or expalined in commit why it is dropped:
> > Acked-by: Sam Ravnborg <sam@ravnborg.org>
> >
> >       Sam
> > _______________________________________________
> > Freedreno mailing list
> > Freedreno@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/freedreno
>
> --
> The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
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