Received: by 2002:a25:c205:0:0:0:0:0 with SMTP id s5csp4716081ybf; Wed, 4 Mar 2020 09:15:20 -0800 (PST) X-Google-Smtp-Source: ADFU+vuwMx8Ss6vBw8aQ4QTdJtaZav9Y+RzjloPg70M6Q8/Ua3l8RBSFcpCObJ/jaW4fCTgS6XEY X-Received: by 2002:aca:7552:: with SMTP id q79mr2380244oic.109.1583342119921; Wed, 04 Mar 2020 09:15:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583342119; cv=none; d=google.com; s=arc-20160816; b=fRjuo9T4xyqTY9NOYC+doru1DLVKujDw6tWBGzegAJJsUgWFoxaP+X3ynVlA+BVXm8 /h+fxcr9eIQZoT5/p5p+VozHwCHSOf6oak34C68NFbYlQVTvvU9YAxNecWWD2nHVvHAT ZX/ZkIKQxCS8P+M0+2JCo7lhOHaJvWuz2yM19LZBNmPC9eFSIdUotrLl8bznkssDocfC 3Z4NHJiI1LwJQQMSlQEcy4MmeYYVIk4bpEeQsIV27PzsYUPJjPGWZ24nlRiknxXOaH6n rxaUxq2cNc8T38jv3nJMLcTDhi/LQAExstpxE8g0FLdSS1KcpiWxXLtgvo2WLEg2oomv 5/Ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=54PKuIEZkviSNXMuXQtFatMWCuyr/HBLzHq19gT0UE8=; b=Xj/BNO9tPCV1vYOWmk3pSrM0zki1Caly4xBsJi0vIHLiN3C40I5e1ArldHW2RAiNF/ zEtgMqHL7bGiyh7UNiTM2F1E80EHQ6HhYfA87452tvbGNdl65gtsuSL6V8tlKmbf59ul mFco4F8In1TGu6tgEpFqyv5znTeg2lYVVf9pmQHN7e7eYjy2RS9jsJRsNB4Z07ueKHWb Zapjds+oxSaLjssSFzoIIcWrjgjzI4LQz7+w+Lt6Qb6i1TlPfFiogiqgW8V8mS/hzcXb Ne7fv+xgipovfssKxNNdwmgn2bsFNJgjxV26DxtihElzGVcmtMwIrKm7RbWrTzxwZxEW KQ9w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a123si1488368oii.169.2020.03.04.09.15.07; Wed, 04 Mar 2020 09:15:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729923AbgCDRNh (ORCPT + 99 others); Wed, 4 Mar 2020 12:13:37 -0500 Received: from mga02.intel.com ([134.134.136.20]:63724 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726748AbgCDRNh (ORCPT ); Wed, 4 Mar 2020 12:13:37 -0500 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Mar 2020 09:13:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,514,1574150400"; d="scan'208";a="240523072" Received: from sjchrist-coffee.jf.intel.com (HELO linux.intel.com) ([10.54.74.202]) by orsmga003.jf.intel.com with ESMTP; 04 Mar 2020 09:13:36 -0800 Date: Wed, 4 Mar 2020 09:13:36 -0800 From: Sean Christopherson To: Tony W Wang-oc Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org, DavidWang@zhaoxin.com, CooperYan@zhaoxin.com, QiyuanWang@zhaoxin.com, HerryYang@zhaoxin.com Subject: Re: [PATCH] x86/Kconfig: Make X86_UMIP to cover Zhaoxin CPUs too Message-ID: <20200304171336.GD21662@linux.intel.com> References: <1583288285-2804-1-git-send-email-TonyWWang-oc@zhaoxin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1583288285-2804-1-git-send-email-TonyWWang-oc@zhaoxin.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 04, 2020 at 10:18:05AM +0800, Tony W Wang-oc wrote: > New Zhaoxin family 7 CPUs support the UMIP (User-Mode Instruction > Prevention) feature. So, modify X86_UMIP depends on Zhaoxin CPUs too. > > Signed-off-by: Tony W Wang-oc > --- > arch/x86/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index 16a4b39..ca4beb8 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -1877,7 +1877,7 @@ config X86_SMAP > > config X86_UMIP > def_bool y > - depends on CPU_SUP_INTEL || CPU_SUP_AMD > + depends on CPU_SUP_INTEL || CPU_SUP_AMD || CPU_SUP_CENTAUR || CPU_SUP_ZHAOXIN The changelog only mentions Zhaoxin, but this also adds Centaur... > prompt "User Mode Instruction Prevention" if EXPERT > ---help--- > User Mode Instruction Prevention (UMIP) is a security feature in > -- > 2.7.4 >