Received: by 2002:a25:c205:0:0:0:0:0 with SMTP id s5csp5207797ybf; Wed, 4 Mar 2020 19:41:28 -0800 (PST) X-Google-Smtp-Source: ADFU+vteDw1bTfRHUjzbDr8IsVUEcpyNqPPzYpXwgGUaTXobcVnZjj/O4DUns82z09WADgH9b1E3 X-Received: by 2002:aca:5757:: with SMTP id l84mr4346855oib.56.1583379687437; Wed, 04 Mar 2020 19:41:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583379687; cv=none; d=google.com; s=arc-20160816; b=d92wViAGgDmk+4hNGsLpCfbXNS4OprRv2BzDYCduCIdYXcFfRcoeYyZGT8o9MP4juU vprd9hKe14IdbuFY2l9BEOrFYGqvpRNwhaCmveanJonTdwqXpUX0Cx7WEy2YciWfucdK 2fdcLruH0gOldoOYrdSy5/697FhVFFHFAWoiSDi31rm5/3Ra71ZyPpF1JFHIl/SNsEDy 1ILFcG9xWJI77DsitnR0mYRSMK+ttSRAfJ79jiUw/teiibWtnU0n6Rc6NVhAYYVGYh78 HGzFTW6PqQ14CwtAZkvdJSAJq4hJD4T5b1DaxML+rvrXPQqwQxaSr/VAQssjn36uSOKu xC2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=1zarx9c0ultFocw4azM0makFye6STppJUQ8JzbX8SkQ=; b=BHyv62Ew0SpfFVNxwDb7TQjR2EjX5RJeUKxEJx6RqXWERe8OO5+rl7oS6mGDVJu4yd otkjzMY6DRydeHqnjz46Smg0T20QEVr4Lxxm8r7ynLU3QAqf/aUc//zu6uWuzm81fLZt MNBHz6bZnoG2AIp/Aa8DuXkNPx1nIAdHCpoWY/RMYvZnZfjb1pKB09omL+v69b1L2p7Z jgJ/ixQL+db67NGhuaoRADqA9L31Zg7nxPUE7wg3QNUkMMtUe7ukJKGxR+sR7sudI4Tb l08ji9P6MQvaMjV/Q2/BEehYqRUX3tb89LCFzqxqh/uluM2J5BT78CGnSlzc5Rhb6ZS+ SC/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j9si2481278oiw.133.2020.03.04.19.41.15; Wed, 04 Mar 2020 19:41:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725991AbgCEDkj (ORCPT + 99 others); Wed, 4 Mar 2020 22:40:39 -0500 Received: from ZXSHCAS2.zhaoxin.com ([203.148.12.82]:51371 "EHLO ZXSHCAS2.zhaoxin.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725963AbgCEDki (ORCPT ); Wed, 4 Mar 2020 22:40:38 -0500 Received: from zxbjmbx1.zhaoxin.com (10.29.252.163) by ZXSHCAS2.zhaoxin.com (10.28.252.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Thu, 5 Mar 2020 11:40:33 +0800 Received: from [10.32.64.44] (10.32.64.44) by zxbjmbx1.zhaoxin.com (10.29.252.163) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Thu, 5 Mar 2020 11:40:32 +0800 Subject: Re: [PATCH] x86/Kconfig: Make X86_UMIP to cover Zhaoxin CPUs too To: Sean Christopherson CC: , , , , , , , , , References: <1583288285-2804-1-git-send-email-TonyWWang-oc@zhaoxin.com> <20200304171336.GD21662@linux.intel.com> From: Tony W Wang-oc Message-ID: Date: Thu, 5 Mar 2020 11:40:02 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20200304171336.GD21662@linux.intel.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.32.64.44] X-ClientProxiedBy: ZXSHCAS1.zhaoxin.com (10.28.252.161) To zxbjmbx1.zhaoxin.com (10.29.252.163) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/03/2020 01:13, Sean Christopherson wrote: > On Wed, Mar 04, 2020 at 10:18:05AM +0800, Tony W Wang-oc wrote: >> New Zhaoxin family 7 CPUs support the UMIP (User-Mode Instruction >> Prevention) feature. So, modify X86_UMIP depends on Zhaoxin CPUs too. >> >> Signed-off-by: Tony W Wang-oc >> --- >> arch/x86/Kconfig | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig >> index 16a4b39..ca4beb8 100644 >> --- a/arch/x86/Kconfig >> +++ b/arch/x86/Kconfig >> @@ -1877,7 +1877,7 @@ config X86_SMAP >> >> config X86_UMIP >> def_bool y >> - depends on CPU_SUP_INTEL || CPU_SUP_AMD >> + depends on CPU_SUP_INTEL || CPU_SUP_AMD || CPU_SUP_CENTAUR || CPU_SUP_ZHAOXIN > > The changelog only mentions Zhaoxin, but this also adds Centaur... Sorry for this. Some Centaur family 7 CPUs also support the UMIP feature, so will resend this patch as a patch series. Sincerely TonyWWang-oc > >> prompt "User Mode Instruction Prevention" if EXPERT >> ---help--- >> User Mode Instruction Prevention (UMIP) is a security feature in >> -- >> 2.7.4 >> > . >