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([2601:646:c200:1ef2:61f8:fe1:ddbe:5c19]) by smtp.gmail.com with ESMTPSA id h2sm44306210pgv.40.2020.03.09.13.16.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Mar 2020 13:16:15 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Andy Lutomirski Mime-Version: 1.0 (1.0) Subject: Re: [RFC PATCH v9 01/27] Documentation/x86: Add CET description Date: Mon, 9 Mar 2020 13:16:14 -0700 Message-Id: References: Cc: Dave Hansen , Yu-cheng Yu , the arch/x86 maintainers , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , LKML , linux-doc@vger.kernel.org, Linux-MM , linux-arch , Linux API , Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , x86-patch-review@intel.com In-Reply-To: To: "H.J. Lu" X-Mailer: iPhone Mail (17D50) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Mar 9, 2020, at 12:50 PM, H.J. Lu wrote: >=20 > =EF=BB=BFOn Mon, Mar 9, 2020 at 12:35 PM Dave Hansen wrote: >>=20 >>> On 3/9/20 12:27 PM, Yu-cheng Yu wrote: >>> On Mon, 2020-03-09 at 10:21 -0700, Dave Hansen wrote: >>>> On 3/9/20 10:00 AM, Yu-cheng Yu wrote: >>>>> On Wed, 2020-02-26 at 09:57 -0800, Dave Hansen wrote>>>>> +Note: >>>>>>> + There is no CET-enabling arch_prctl function. By design, CET is >>>>>>> + enabled automatically if the binary and the system can support it= . >>>>>>=20 >>>>>> This is kinda interesting. It means that a JIT couldn't choose to >>>>>> protect the code it generates and have different rules from itself? >>>>>=20 >>>>> JIT needs to be updated for CET first. Once that is done, it runs wit= h CET >>>>> enabled. It can use the NOTRACK prefix, for example. >>>>=20 >>>> Am I missing something? >>>>=20 >>>> What's the direct connection between shadow stacks and Indirect Branch >>>> Tracking other than Intel marketing umbrellas? >>>=20 >>> What I meant is that JIT code needs to be updated first; if it skips RET= s, >>> it needs to unwind the stack, and if it does indirect JMPs somewhere it >>> needs to fix up the branch target or use NOTRACK. >>=20 >> I'm totally lost. I think we have very different models of how a JIT >> might generate and run code. >>=20 >> I can totally see a scenario where a JIT goes and generates a bunch of >> code, then forks a new thread to go run that code. The control flow of >> the JIT thread itself *NEVER* interacts with the control flow of the >> program it writes. They never share a stack and nothing ever jumps or >> rets between the two worlds. >>=20 >> Does anything actually do that? I've got no idea. But, I can clearly >> see a world where the entirety of Chrome and Firefox and the entire rust >> runtime might not be fully recompiled and CET-enabled for a while. But, >> we still want the JIT-generated code to be CET-protected since it has >> the most exposed attack surface. >>=20 >> I don't think that's too far-fetched. >=20 > CET support is all or nothing. You can mix and match, but you will get > no CET protection, similar to NX feature. >=20 Can you explain? If a program with the magic ELF CET flags missing can=E2=80=99t make a threa= d with IBT and/or SHSTK enabled, then I think we=E2=80=99ve made an error an= d should fix it. > --=20 > H.J.