Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Date:   Tue, 10 Mar 2020 13:34:59 +0100
From:   Robert Richter <rrichter@marvell.com>
To:     Marc Zyngier <maz@kernel.org>
CC:     <kvmarm@lists.cs.columbia.edu>, <linux-kernel@vger.kernel.org>,
        Eric Auger <eric.auger@redhat.com>,
        James Morse <james.morse@arm.com>,
        Julien Thierry <julien.thierry.kdev@gmail.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Andrew Murray <Andrew.Murray@arm.com>,
        Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH v3 03/32] irqchip/gic-v3: Workaround Cavium TX1 erratum
 when reading GICD_TYPER2
Message-ID: <20200310123459.d5i4bwrg7lq4fwmo@rric.localdomain>
References: <20191224111055.11836-1-maz@kernel.org>
 <20191224111055.11836-4-maz@kernel.org>
 <20200309221137.5pjh4vkc62ft3h2a@rric.localdomain>
 <b1b7db1f0e1c47b7d9e2dfbbe3409b77@kernel.org>
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <b1b7db1f0e1c47b7d9e2dfbbe3409b77@kernel.org>
User-Agent: NeoMutt/20170113 (1.7.2)
MIME-Version: 1.0
X-MS-Exchange-MessageSentRepresentingType: 1
Received: from rric.localdomain (31.208.96.227) by HE1PR0301CA0008.eurprd03.prod.outlook.com (2603:10a6:3:76::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2793.11 via Frontend Transport; Tue, 10 Mar 2020 12:35:05 +0000
X-Originating-IP: [31.208.96.227]
X-MS-PublicTrafficType: Email
X-MS-Office365-Filtering-Correlation-Id: 87f98d58-d58f-4df1-9372-08d7c4ef7771
X-MS-TrafficTypeDiagnostic: MN2PR18MB3669:
X-Microsoft-Antispam-PRVS: <MN2PR18MB366975A2944AF82DB1C27C77D9FF0@MN2PR18MB3669.namprd18.prod.outlook.com>
X-MS-Oob-TLC-OOBClassifiers: OLM:3826;
X-Forefront-PRVS: 033857D0BD
X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10009020)(4636009)(346002)(136003)(39850400004)(376002)(396003)(366004)(199004)(189003)(7696005)(1076003)(186003)(5660300002)(2906002)(6916009)(4326008)(16526019)(26005)(53546011)(956004)(6506007)(52116002)(7416002)(54906003)(9686003)(8936002)(81156014)(81166006)(6666004)(316002)(66946007)(86362001)(8676002)(66476007)(66556008)(55016002)(478600001);DIR:OUT;SFP:1101;SCL:1;SRVR:MN2PR18MB3669;H:MN2PR18MB3408.namprd18.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1;
Received-SPF: None (protection.outlook.com: marvell.com does not designate
 permitted sender hosts)
X-MS-Exchange-SenderADCheck: 1
X-Microsoft-Antispam: BCL:0;
X-Microsoft-Antispam-Message-Info: BqndTi5l/4p72G1I7dcR4UdI4hZNl/6L9qWACznB9dxgoOijD28+zUp/dN0uXrbpJMT1xXCdZ1MtMJ5YStd0m1bFycnd9yHP0rIAMojBfCFNho8ChvAoCvTRpXTfvuQZT7RrddEzPM9XgHtgG2eQHQlvx29c6jLYPEQy9vUUb269K9lRwJQVBQN3m5bSVVY63tGRoQSCVdElhdEDuOh/FeUBt4Vf1iU3Ql2dHfq56C6Aw0CUAcc8b0Sclwhy8tEWVbfpChv6axPGkknRLA2OzFw+EO/KeZ8PWXboBy0QcLMAu6E6A7R8CBGVWEgZoki1QBfIOuo2/OlZNU6rX77mSB/Q7U1iMB5y/vYAMPf3Dqkqb69aquwOcSjr0X53savg4MghEQreE3gSGjqsGNYTJiwRVLo4CbQYxDwe39c56TA4ainPL9o0GhOMD1O8OvJ9
X-MS-Exchange-AntiSpam-MessageData: 4JJIemrC9zA/KUUnUv1xosM5Cjw3Gj9XCZXKeVYrU5L1uzH9tMsy56tlopkPUr+q/4/sGjF+2OEy3uHED2PH0GHAk+t1Xtbh8awIBCLeondfD6hIjx+zcW+ZQ1dUVGz30uuE6pyBhOjpJ5o6cbzwbQ==
X-MS-Exchange-CrossTenant-Network-Message-Id: 87f98d58-d58f-4df1-9372-08d7c4ef7771
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2020 12:35:07.8473
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 70e1fb47-1155-421d-87fc-2e58f638b6e0
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: yVUtdL5uzY1KJ4E6NwEeva8klUCCcejT+JBay7DSINUKQetU9qk8Jct9J1Vq7D0w2VwQQMUIJ1/PZ/bB+FysAw==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR18MB3669
X-OriginatorOrg: marvell.com
X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572
 definitions=2020-03-10_06:2020-03-10,2020-03-10 signatures=0
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On 10.03.20 11:41:09, Marc Zyngier wrote:
> On 2020-03-09 22:11, Robert Richter wrote:
> > On 24.12.19 11:10:26, Marc Zyngier wrote:

> > > @@ -1502,6 +1512,12 @@ static const struct gic_quirk gic_quirks[] = {
> > >  		.mask	= 0xffffffff,
> > >  		.init	= gic_enable_quirk_hip06_07,
> > >  	},
> > > +	{
> > > +		.desc	= "GICv3: Cavium TX1 GICD_TYPER2 erratum",
> > 
> > There is no errata number yet.
> 
> Please let me know when/if you obtain one.

Yes, will do.

> 
> > 
> > > +		.iidr	= 0xa100034c,
> > > +		.mask	= 0xfff00fff,
> > > +		.init	= gic_enable_quirk_tx1,
> > 
> > All TX1 and OcteonTX parts are affected, which is a0-a7 and b0-b7. So
> > the iidr/mask should be:
> > 
> > 		.iidr   = 0xa000034c,
> > 		.mask   = 0xe8f00fff,
> 
> Thanks, that's pretty helpful. I'll update the patch with these values
> and the corresponding description.

Thanks for the update.

> 
> > > +	},
> > >  	{
> > >  	}
> > >  };
> > > @@ -1577,7 +1593,12 @@ static int __init gic_init_bases(void __iomem
> > > *dist_base,
> > >  	pr_info("%d SPIs implemented\n", GIC_LINE_NR - 32);
> > >  	pr_info("%d Extended SPIs implemented\n", GIC_ESPI_NR);
> > > 
> > > -	gic_data.rdists.gicd_typer2 = readl_relaxed(gic_data.dist_base +
> > > GICD_TYPER2);
> > > +	/*
> > > +	 * ThunderX1 explodes on reading GICD_TYPER2, in total violation
> > > +	 * of the spec (which says that reserved addresses are RES0).
> > > +	 */
> > > +	if (!(gic_data.flags & FLAGS_WORKAROUND_GICD_TYPER2_TX1))
> > > +		gic_data.rdists.gicd_typer2 = readl_relaxed(gic_data.dist_base +
> > > GICD_TYPER2);
> > 
> > You already said that checking for ArchRev of GICD_PIDR2 isn't an
> > option here. Though, it could...
> 
> Once GICv3.2 starts using this register as well (because GICD_TYPER is
> already completely full), we'd have to fix it again. There is also the thing
> you hinted at in the other thread: TX1 will generate a SEA on every reserved
> GICD registers, so we may need to protect more than just this one over time,
> and maybe more than just in the distributor.

I am fine with both. And right, it would be possibly needed for other
ranges too.

Thanks,

-Robert

> 
> Thanks,
> 
>         M.
> -- 
> Jazz is not dead. It just smells funny...