Received: by 2002:a25:e7d8:0:0:0:0:0 with SMTP id e207csp1131411ybh; Tue, 10 Mar 2020 15:27:38 -0700 (PDT) X-Google-Smtp-Source: ADFU+vvYpc7T9xZJr4NlHpqhFH38wEAT5kWFEkGhlxRaLmkF7THYUc28ouXDOZ+tnqaWWuVEy0fQ X-Received: by 2002:aca:4d49:: with SMTP id a70mr1694683oib.152.1583879258391; Tue, 10 Mar 2020 15:27:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1583879258; cv=none; d=google.com; s=arc-20160816; b=XXYc7YKXirothn+BfgJ7J4DlJy3FxYo3x4CR3OPQEtnrgFFCZpwZtm0VlkvDdERdUD XR98kurVaeqfPvLGFzQW1OIcBEevCX6LAhP0qPzoPIFOuej6Psv7i5pauRpvgJGUDAMc KImTxkMO4k+i4kAndAZGCOXIffFFYZwPqXwKY6gD+s1s6rUYNnmf8yTTDVBF3/rFQptD czup1JfNcOCG9ZghnG/ThFjSdnmzJR1mRqs80n2DTdMVbB3mGHVUTy/50JFfuPweRMNx khGDBW3b3P65bneb2KCcaWpYLUpZOXejUD2ZSB5dOndwt9hWpBnXjJ5atEChuBNPbqMj puqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=LRIYAknNxCCkAbcBzTd0CQskrPmjGDZkwVOPtX/Iex8=; b=hQAdqb14V/8kljAp73DvtrG+SXkr0XkdkcxkYl//GczpKta1Mx9zngZSC75R/6mLDY 5+y19UrQXCC7GBtU03WzFFxXAdg/B0bW0o3ZpALmXywPWuOsXrltxyfKH4Uryskghzsv nMo7aYwV31LzcD7uoTXKLVL2GQxdmL0epvnfWU3h92734rhM3EKeeC8bU5kKkj4t7gb8 mTto0aK0Gn9b71aqyyfYn5TyD/3iq/Jj8EDlFvuxJ/gWcxRX4X4FB3lXvccmIu+6+n96 WCRh+HvtdM4xZbJDTkgZksYE2bduiZ1SKaUXgJbA4O/j7LQKH6xV1/DYe9fVSlKAPaFC TsUQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u24si8507otk.287.2020.03.10.15.27.25; Tue, 10 Mar 2020 15:27:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727771AbgCJWYT (ORCPT + 99 others); Tue, 10 Mar 2020 18:24:19 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:8935 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726315AbgCJWYT (ORCPT ); Tue, 10 Mar 2020 18:24:19 -0400 Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-02.qualcomm.com with ESMTP; 10 Mar 2020 15:24:18 -0700 Received: from gurus-linux.qualcomm.com ([10.46.162.81]) by ironmsg-SD-alpha.qualcomm.com with ESMTP; 10 Mar 2020 15:24:18 -0700 Received: by gurus-linux.qualcomm.com (Postfix, from userid 383780) id 50F004A2B; Tue, 10 Mar 2020 15:24:18 -0700 (PDT) Date: Tue, 10 Mar 2020 15:24:18 -0700 From: Guru Das Srinagesh To: Guenter Roeck Cc: Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , linux-pwm@vger.kernel.org, Thierry Reding , Subbaraman Narayanamurthy , linux-kernel@vger.kernel.org, Kamil Debski , Bartlomiej Zolnierkiewicz , Jean Delvare , Liam Girdwood , Mark Brown , linux-hwmon@vger.kernel.org Subject: Re: [PATCH v7 03/13] hwmon: pwm-fan: Use 64-bit division macros for period and duty cycle Message-ID: <20200310222418.GA8053@codeaurora.org> References: <20200309214822.GA19773@roeck-us.net> <20200310120814.4kjxmii3c7zxw55y@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 10, 2020 at 08:05:58AM -0700, Guenter Roeck wrote: > I don't see support in the LED subsystem to utilize the PWM framework directly > for blinking. Plus, you say yourself that it isn't a _real_ use case, just a > theoretic one. An example use case is a mobile phone OEM that wishes to set a period of 5 seconds or more for, say, a low battery slow blinking indication - currently this is not possible. The PWM framework not having direct support for blinking should not be a concern if the PWM peripheral being controlled supports it via register writes. > Either case, the reason / use case for this series should be explained > in the summary patch. That is what it is for. That case is not made. Will upload a new patchset adding more details in the summary patch. Thank you. Guru Das.