To: Grant Grundler <iod00d@hp.com>
Cc: "Luck, Tony" <tony.luck@intel.com>, Chris Wedgwood <cw@f00f.org>,
       Grant Grundler <grundler@parisc-linux.org>, Greg KH <gregkh@suse.de>,
       linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org,
       linux-ia64@vger.kernel.org, linux-pci@atrey.karlin.mff.cuni.cz,
       "Miller, Mike (OS Dev)" <Mike.Miller@hp.com>,
       Jesse Barnes <jbarnes@virtuousgeek.org>
Subject: Re: Problems with MSI-X on ia64
References: <B8E391BBE9FE384DAA4C5C003888BE6F05BF610F@scsmsx401.amr.corp.intel.com>
	<20060217200454.GA24942@esmail.cup.hp.com>
From: Roland Dreier <rdreier@cisco.com>
Date: Fri, 17 Feb 2006 12:21:37 -0800
In-Reply-To: <20060217200454.GA24942@esmail.cup.hp.com> (Grant Grundler's
 message of "Fri, 17 Feb 2006 12:04:54 -0800")
Message-ID: <aday809d9da.fsf@cisco.com>
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BARs above 4G on i386 raise all sorts of issues.  I think Grant's
original patch (which changes phys_addr in drivers/pci/msi.c to
unsigned long) is correct as it stands, because the MSI code is going
to use that address to ioremap() the MSI-X table.  And the address
passed to ioremap is unsigned long anyway.

Some extension like ioremap_pfn() or something like that is going to
needed to handling giving the kernel access to BARs above 4G on 32-bit
archs.

 - R.
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