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Thu, 12 Mar 2020 09:09:04 +0000 From: peng.fan@nxp.com To: shawnguo@kernel.org, s.hauer@pengutronix.de, leonard.crestez@nxp.com, sboyd@kernel.org, abel.vesa@nxp.com Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Anson.Huang@nxp.com, daniel.baluta@nxp.com, aford173@gmail.com, ping.bai@nxp.com, jun.li@nxp.com, l.stach@pengutronix.de, andrew.smirnov@gmail.com, agx@sigxcpu.org, angus@akkea.ca, heiko@sntech.de, fugang.duan@nxp.com, linux-clk@vger.kernel.org, Peng Fan Subject: [PATCH 08/10] clk: imx: add imx8m_clk_hw_composite_bus Date: Thu, 12 Mar 2020 17:01:30 +0800 Message-Id: <1584003692-25523-9-git-send-email-peng.fan@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584003692-25523-1-git-send-email-peng.fan@nxp.com> References: <1584003692-25523-1-git-send-email-peng.fan@nxp.com> Content-Type: text/plain X-ClientProxiedBy: SG2PR02CA0052.apcprd02.prod.outlook.com (2603:1096:4:54::16) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0052.apcprd02.prod.outlook.com (2603:1096:4:54::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.2814.14 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: ACC0EEop3CCQqZNpYOJugNbxzCPQdqnhPfQwXLDesI/bfVClCJSqqmm/H5O5q8scEl/vFHPD84MneiS6oCaFgluPSvlKI5YLsrVjiAH3OyHzibrymUWpcnXTf4aAODSwMdwuDjJQ3Q2xXH1mP7NASGC21PaI4j29odhUgsy3UDiAsZ739SF786gbAIn8sCIh3n+R+TwGheb1Txb1A9TB0kXUG5vS3WahFObf6npQNgsDfgXB4If7LLfis50Ah4uEo3HHKp+qY5MV8GlsPYjsqiZGnUZRQpu8HttgVTf5rjCyytoPaZRd236X33hMru/Ew+XtgX28fxX1togZYOrkwmIKzmGwk3zTunYztNKaceOfMhznraMHs1Z/hTbl35fbop4ujebrIlgTPCbtC9pUoFSgtIDgb6rFm+2aOc/U9qNX/HI+dhUNCtm7BI7kVZC58pRdRgOTboc+ed24ArioMa+QdNHVaJkOr1GoN3ENAGMewVW5PNQW9lZ5zoKpZjcr X-MS-Exchange-AntiSpam-MessageData: /ALYEcpm/fAdbG7EmhL4JXxL1uhznWLpNWDaGI6bpWYVdujmFkSl0j4oUxCzLFZwwnopRHTmCjk9RslhGVlfBEniZhhfQcFrR1HNS+MqNIcTrlQdqvNKzWTkCfRvkXQHupTMlq0yXu4nXE2viguRCw== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4d8df14c-cad3-454a-a7a1-08d7c665030b X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2020 09:09:04.3365 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: SKwuznjBeH8IuwyAsTQrkOa+xkGnPwNBIif/cFRnr/RkdxNgqq6gX7lnwRmkV3is2c22SYNt62fR4tLB55K7DQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5795 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan Introduce imx8m_clk_hw_composite_bus api for bus clk root slice usage. Because the mux switch sequence issue, we could not reuse Peripheral Clock Slice code, need use composite specific mux operation. Signed-off-by: Peng Fan --- drivers/clk/imx/clk-composite-8m.c | 5 +++++ drivers/clk/imx/clk.h | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index fe05b3c4d4fc..086c9ed68bdf 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -223,6 +223,11 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, div->width = PCG_CORE_DIV_WIDTH; divider_ops = &clk_divider_ops; mux_ops = &imx8m_clk_composite_mux_ops; + } else if (composite_flags & IMX_COMPOSITE_BUS) { + div->shift = PCG_PREDIV_SHIFT; + div->width = PCG_PREDIV_WIDTH; + divider_ops = &imx8m_clk_composite_divider_ops; + mux_ops = &imx8m_clk_composite_mux_ops; } else { div->shift = PCG_PREDIV_SHIFT; div->width = PCG_PREDIV_WIDTH; diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index f074dd8ec42e..d4ea1609bcb7 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -478,6 +478,7 @@ struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name, struct clk *step); #define IMX_COMPOSITE_CORE BIT(0) +#define IMX_COMPOSITE_BUS BIT(1) struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, const char * const *parent_names, @@ -486,6 +487,12 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, u32 composite_flags, unsigned long flags); +#define imx8m_clk_hw_composite_bus(name, parent_names, reg) \ + imx8m_clk_hw_composite_flags(name, parent_names, \ + ARRAY_SIZE(parent_names), reg, \ + IMX_COMPOSITE_BUS, \ + CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE) + #define imx8m_clk_hw_composite_core(name, parent_names, reg) \ imx8m_clk_hw_composite_flags(name, parent_names, \ ARRAY_SIZE(parent_names), reg, \ -- 2.16.4