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Date:   Thu, 12 Mar 2020 11:40:12 -0400
From:   William Breathitt Gray <vilhelm.gray@gmail.com>
To:     Syed Nayyar Waris <syednwaris@gmail.com>
Cc:     jic23@kernel.org, linux-iio@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/3] counter: 104-quad-8: Add lock guards for filter
 clock prescaler
Message-ID: <20200312154012.GC3250@icarus>
References: <20200312112552.GA32509@syed>
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On Thu, Mar 12, 2020 at 04:55:52PM +0530, Syed Nayyar Waris wrote:
> Add lock protection from race conditions in the 104-quad-8 counter
> driver for filter clock prescaler related changes. There is no IRQ
> handling so used spin_lock calls for protection.
>=20
> Fixes: 9b74dddf79be ("counter: 104-quad-8: Support Filter Clock
> Prescaler")
>=20
> Signed-off-by: Syed Nayyar Waris <syednwaris@gmail.com>
>=20
> Split the patch from generic interface and differential encoder cable
> status changes. Also, include more code statements for protection using
> spin_lock calls and remove protection from few code statements which are
> unnecessary.
> ---

Hello Syed,

Remove the review comments from the commit message and I think this
patch is all right. You can also extend the Fixes line so that it
doesn't wrap around. Add the following Signed-off-by line underneath
yours and it'll remind me that I've already reviewed this patch when you
submit v4 of your patchset:

Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>

Thank you,

William Breathitt Gray

>  drivers/counter/104-quad-8.c | 4 ++++
>  1 file changed, 4 insertions(+)
>=20
> diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
> index 9dab190..58615e4 100644
> --- a/drivers/counter/104-quad-8.c
> +++ b/drivers/counter/104-quad-8.c
> @@ -1230,6 +1230,8 @@ static ssize_t quad8_signal_fck_prescaler_write(str=
uct counter_device *counter,
>  	if (ret)
>  		return ret;
> =20
> +	spin_lock(&priv->lock);
> +
>  	priv->fck_prescaler[channel_id] =3D prescaler;
> =20
>  	/* Reset Byte Pointer */
> @@ -1240,6 +1242,8 @@ static ssize_t quad8_signal_fck_prescaler_write(str=
uct counter_device *counter,
>  	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,
>  	     base_offset + 1);
> =20
> +	spin_unlock(&priv->lock);
> +
>  	return len;
>  }
> =20
> --=20
> 2.7.4
>=20

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