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From:   Leonard Crestez <leonard.crestez@nxp.com>
To:     Peng Fan <peng.fan@nxp.com>,
        "jassisinghbrar@gmail.com" <jassisinghbrar@gmail.com>,
        "o.rempel@pengutronix.de" <o.rempel@pengutronix.de>
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        Aisheng Dong <aisheng.dong@nxp.com>,
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        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V6 0/4] mailbox/firmware: imx: support SCU channel type
Thread-Topic: [PATCH V6 0/4] mailbox/firmware: imx: support SCU channel type
Thread-Index: AQHV8emRabKKTJAuM0OK7xtU5vZU9A==
Date:   Thu, 12 Mar 2020 23:09:35 +0000
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On 2020-03-04 7:55 AM, Peng Fan wrote:=0A=
> From: Peng Fan <peng.fan@nxp.com>=0A=
> =0A=
> V6:=0A=
>   Add Oleksij's R-b tag=0A=
>   Patch 3/4, per https://www.kernel.org/doc/Documentation/printk-formats.=
txt=0A=
>   should use %zu for printk sizeof=0A=
> =0A=
> V5:=0A=
>   Move imx_mu_dcfg below imx_mu_priv=0A=
>   Add init hooks to imx_mu_dcfg=0A=
>   drop __packed __aligned=0A=
>   Add more debug msg=0A=
>   code style cleanup=0A=
> =0A=
> V4:=0A=
>   Drop IMX_MU_TYPE_[GENERIC, SCU]=0A=
>   Pack MU chans init to separate function=0A=
>   Add separate function for SCU chans init and xlate=0A=
>   Add santity check to msg hdr.size=0A=
>   Limit SCU MU chans to 6, TX0/RX0/RXDB[0-3]=0A=
> =0A=
> V3:=0A=
>   Rebase to Shawn's for-next=0A=
>   Include fsl,imx8-mu-scu compatible=0A=
>   Per Oleksij's comments, introduce generic tx/rx and added scu mu type=
=0A=
>   Check fsl,imx8-mu-scu in firmware driver for fast_ipc=0A=
> =0A=
> V2:=0A=
>   Drop patch 1/3 which added fsl,scu property=0A=
>   Force to use scu channel type when machine has node compatible "fsl,imx=
-scu"=0A=
>   Force imx-scu to use fast_ipc=0A=
> =0A=
>   I not found a generic method to make SCFW message generic enough, SCFW=
=0A=
>   message is not fixed length including TX and RX. And it use TR0/RR0=0A=
>   interrupt.=0A=
> =0A=
> V1:=0A=
> Sorry to bind the mailbox/firmware patch together. This is make it=0A=
> to understand what changed to support using 1 TX and 1 RX channel=0A=
> for SCFW message.=0A=
> =0A=
> Per i.MX8QXP Reference mannual, there are several message using=0A=
> examples. One of them is:=0A=
> Passing short messages: Transmit register(s) can be used to pass=0A=
> short messages from one to four words in length. For example,=0A=
> when a four-word message is desired, only one of the registers=0A=
> needs to have its corresponding interrupt enable bit set at the=0A=
> receiver side.=0A=
> =0A=
> This patchset is to using this for SCFW message to replace four TX=0A=
> and four RX method.=0A=
=0A=
Tested-by: Leonard Crestez <leonard.crestez@nxp.com>=0A=
=0A=
My stress tests pass on imx8qxp with this patcheset, however performance =
=0A=
is not greatly improved. My guess is that this happens because of too =0A=
many interrupts.=0A=
=0A=
Is there really a reason to enable TIE? Spinning on TE bits without any =0A=
interrupts should be just plain faster.=0A=
=0A=
> =0A=
> Peng Fan (4):=0A=
>    dt-bindings: mailbox: imx-mu: add SCU MU support=0A=
>    mailbox: imx: restructure code to make easy for new MU=0A=
>    mailbox: imx: add SCU MU support=0A=
>    firmware: imx-scu: Support one TX and one RX=0A=
> =0A=
>   .../devicetree/bindings/mailbox/fsl,mu.txt         |   2 +=0A=
>   drivers/firmware/imx/imx-scu.c                     |  54 ++++-=0A=
>   drivers/mailbox/imx-mailbox.c                      | 267 ++++++++++++++=
+++----=0A=
>   3 files changed, 260 insertions(+), 63 deletions(-)=0A=
> =0A=
> =0A=
> base-commit: 770fbb32d34e5d6298cc2be590c9d2fd6069aa17=0A=
> =0A=
=0A=