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x-originating-ip: [119.31.174.68] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: cdbedf90-873d-41d4-03f1-08d7c6ead8c7 x-ms-traffictypediagnostic: AM0PR04MB5986:|AM0PR04MB5986: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:1775; x-forefront-prvs: 034119E4F6 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(39860400002)(136003)(396003)(346002)(366004)(376002)(199004)(8936002)(81156014)(81166006)(66556008)(44832011)(316002)(33656002)(186003)(86362001)(26005)(966005)(66476007)(76116006)(6506007)(53546011)(66446008)(64756008)(7696005)(54906003)(66946007)(110136005)(71200400001)(52536014)(15650500001)(5660300002)(9686003)(478600001)(8676002)(4326008)(55016002)(2906002);DIR:OUT;SFP:1101;SCL:1;SRVR:AM0PR04MB5986;H:AM0PR04MB4481.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 63cYTHs4W7nyoR4T8VXkEcNT2ar2aY6amDo+xbb5CoCAAy3sWMMSz4REz1Rodk90n8uuS1KtsH1JKa6HWt6Pul5ROE6X27rVNXXl7ux9BHM8kgcAsoNDBH0H1WE6qmCAQr3SfQmqip/O5INrkPfh+++WmWpSSY89m/3/XwhPfR/egQbCGrxl2HEASmFBWLE1MFU0IgS9SFHki2z867wzWSF0cvukT6PWab/TgEjsW//r2Nax/d5LUYIcQa0c74Yd5eYz2AOK2lP8id4/UJzgeiBaLpIc8rw/c5x+HbYYehDBAxDvxgoysOYSZUKCXAtmLZFDUPfcZ/3X63x+KxNmBp9hnTiLnKsJ4Eo2Tc0ObOc6edKybAnfvfir/ZvQaU6OPdu4SC20bXcog1rxeKbsMNK6WNqxxuzM1legKALPu3Fr8JJ5aJyZa5WzyO4mVqQ0fL+kuwtYrSKPLMk7c2kn8GdzDZzUkCqhO7zaDbSZ5mlrXmGmc7OGS2O9OVA4iA54yPiqskUBwRWVM5vAPAa3LQ== x-ms-exchange-antispam-messagedata: mZ3MFL3+CSaxjVvbk3RDE+XNWgS1E28Jlwf+ppBJ3Rvq9jlukQF2xHkqj1YoEIaBZt+1MlGWDGBGKajEuhF+fiUaVdkymI6UPKDLX/39058pYxo7Y99134U8J+hpsiPhneehhX7drQbMfwfN0E0YdA== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: cdbedf90-873d-41d4-03f1-08d7c6ead8c7 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Mar 2020 01:07:05.6333 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XnEjNKtpOtd4hTaUVYDTjfy+SEV458dOCLKBg2FX7WmQ6K5FSgTxLfa9CrBB7CfTFSyN+BjKG4pL2Ya7WoPRmQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5986 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Leonard, > Subject: Re: [PATCH V6 0/4] mailbox/firmware: imx: support SCU channel > type >=20 > On 2020-03-04 7:55 AM, Peng Fan wrote: > > From: Peng Fan > > > > V6: > > Add Oleksij's R-b tag > > Patch 3/4, per > https://www.kernel.org/doc/Documentation/printk-formats.txt > > should use %zu for printk sizeof > > > > V5: > > Move imx_mu_dcfg below imx_mu_priv > > Add init hooks to imx_mu_dcfg > > drop __packed __aligned > > Add more debug msg > > code style cleanup > > > > V4: > > Drop IMX_MU_TYPE_[GENERIC, SCU] > > Pack MU chans init to separate function > > Add separate function for SCU chans init and xlate > > Add santity check to msg hdr.size > > Limit SCU MU chans to 6, TX0/RX0/RXDB[0-3] > > > > V3: > > Rebase to Shawn's for-next > > Include fsl,imx8-mu-scu compatible > > Per Oleksij's comments, introduce generic tx/rx and added scu mu type > > Check fsl,imx8-mu-scu in firmware driver for fast_ipc > > > > V2: > > Drop patch 1/3 which added fsl,scu property > > Force to use scu channel type when machine has node compatible > "fsl,imx-scu" > > Force imx-scu to use fast_ipc > > > > I not found a generic method to make SCFW message generic enough, > SCFW > > message is not fixed length including TX and RX. And it use TR0/RR0 > > interrupt. > > > > V1: > > Sorry to bind the mailbox/firmware patch together. This is make it to > > understand what changed to support using 1 TX and 1 RX channel for > > SCFW message. > > > > Per i.MX8QXP Reference mannual, there are several message using > > examples. One of them is: > > Passing short messages: Transmit register(s) can be used to pass short > > messages from one to four words in length. For example, when a > > four-word message is desired, only one of the registers needs to have > > its corresponding interrupt enable bit set at the receiver side. > > > > This patchset is to using this for SCFW message to replace four TX and > > four RX method. >=20 > Tested-by: Leonard Crestez >=20 Thanks for the test. > My stress tests pass on imx8qxp with this patcheset, however performance = is > not greatly improved. My guess is that this happens because of too many > interrupts. Might be. Could you share your testcase? >=20 > Is there really a reason to enable TIE? Spinning on TE bits without any > interrupts should be just plain faster. I could try to disable TIE and give a try. If performance improves lot, I c= ould change to non TX interrupt. Oleksij, do you agree? Thanks, Peng. >=20 > > > > Peng Fan (4): > > dt-bindings: mailbox: imx-mu: add SCU MU support > > mailbox: imx: restructure code to make easy for new MU > > mailbox: imx: add SCU MU support > > firmware: imx-scu: Support one TX and one RX > > > > .../devicetree/bindings/mailbox/fsl,mu.txt | 2 + > > drivers/firmware/imx/imx-scu.c | 54 ++++- > > drivers/mailbox/imx-mailbox.c | 267 > +++++++++++++++++---- > > 3 files changed, 260 insertions(+), 63 deletions(-) > > > > > > base-commit: 770fbb32d34e5d6298cc2be590c9d2fd6069aa17 > >