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Subject: Re: [PATCH v2 2/4] dt-bindings: display: bridge: add it66121 bindings
To:     Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc:     Phong LE <ple@baylibre.com>, airlied@linux.ie, daniel@ffwll.ch,
        robh+dt@kernel.org, mark.rutland@arm.com, a.hajda@samsung.com,
        jonas@kwiboo.se, jernej.skrabec@siol.net, sam@ravnborg.org,
        mripard@kernel.org, heiko.stuebner@theobroma-systems.com,
        linus.walleij@linaro.org, stephan@gerhold.net, icenowy@aosc.io,
        broonie@kernel.org, mchehab+samsung@kernel.org,
        davem@davemloft.net, gregkh@linuxfoundation.org,
        Jonathan.Cameron@huawei.com, andriy.shevchenko@linux.intel.com,
        dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <20200311125135.30832-1-ple@baylibre.com>
 <20200311125135.30832-3-ple@baylibre.com>
 <20200313134013.GC4751@pendragon.ideasonboard.com>
 <03d5bb7f-db1b-79df-bd46-3ac0f3b4feb1@baylibre.com>
 <20200313141713.GG4751@pendragon.ideasonboard.com>
From:   Neil Armstrong <narmstrong@baylibre.com>
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Organization: Baylibre
Message-ID: <87a0d129-163b-18ae-eb09-cf7df4048dad@baylibre.com>
Date:   Fri, 13 Mar 2020 16:29:58 +0100
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In-Reply-To: <20200313141713.GG4751@pendragon.ideasonboard.com>
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On 13/03/2020 15:17, Laurent Pinchart wrote:
> Hi Neil,
> 
> On Fri, Mar 13, 2020 at 03:12:13PM +0100, Neil Armstrong wrote:
>> On 13/03/2020 14:40, Laurent Pinchart wrote:
>>> On Wed, Mar 11, 2020 at 01:51:33PM +0100, Phong LE wrote:
>>>> Add the ITE bridge HDMI it66121 bindings.
>>>>
>>>> Signed-off-by: Phong LE <ple@baylibre.com>
>>>> ---
>>>>  .../bindings/display/bridge/ite,it66121.yaml  | 98 +++++++++++++++++++
>>>>  1 file changed, 98 insertions(+)
>>>>  create mode 100644 Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml
>>>>

[...]

>>>> +
>>>> +  pclk-dual-edge:
>>>> +    maxItems: 1
>>>> +    description: enable pclk dual edge mode.
>>>
>>> I'm having a bit of trouble understanding how this operates. Looking at
>>> the driver code the property is only taken into account to calculate the
>>> maximum allowed frequency. How is the IT66121 configured for single vs.
>>> dual pixel clock edge mode ?
>>
>> Dual edge mode is Dual-Data-Rate mode, the normal mode is MEDIA_BUS_FMT_RGB888_1X24 and dual edge is
>> MEDIA_BUS_FMT_RGB888_2X12_LE (or MEDIA_BUS_FMT_RGB888_2X12_BE, not sure) on a single clock period.
>>
>> This should be negociated at runtime, but the bus width should be specified somewhere to select
>> one of the modes.
> 
> How about replacing this property by bus-width to report the connected
> bus width ? It should then become an endpoint property.

It was my thought.

The mediatek dpi also uses this property, which is also very wrong in the same way.

Neil

[...]