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[209.132.180.67]) by mx.google.com with ESMTP id k6si9436435otn.172.2020.03.16.00.47.10; Mon, 16 Mar 2020 00:47:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=IVFLh0VC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730004AbgCPHqg (ORCPT + 99 others); Mon, 16 Mar 2020 03:46:36 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:11495 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729940AbgCPHqf (ORCPT ); Mon, 16 Mar 2020 03:46:35 -0400 X-UUID: 54d369bbfe7f4beba454c45da2ddc979-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=BlXDFmnnqorVgQpulgg7ck1YZ6kA0CFS6J6lD1RPe/M=; b=IVFLh0VCB+aMcNA9+LrG31fTNQM1aqh7VfjWgnLRb2dOFhJQn/vurbsCUI+pBxJgWwDg/2WLooF83pi4DO5NQ3JTON6pj8aGtJSSNw4eIY50bIYKbM7dvQ7rWhcb5eTN3RWtrVAnMrlTPFFRgq9f9Nf94JlhkS6IJSe5kJTotAU=; X-UUID: 54d369bbfe7f4beba454c45da2ddc979-20200316 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 108033686; Mon, 16 Mar 2020 15:46:31 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 15:45:32 +0800 Received: from [172.21.77.33] (172.21.77.33) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 15:43:32 +0800 Message-ID: <1584344790.29731.1.camel@mtkswgap22> Subject: Re: [PATCH 1/1] dt-bindings: cpu: Add a support cpu type for cortex-a75 From: Hanks Chen To: Matthias Brugger CC: Rob Herring , , , , Date: Mon, 16 Mar 2020 15:46:30 +0800 In-Reply-To: References: <1584284885-20836-1-git-send-email-hanks.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org T24gU3VuLCAyMDIwLTAzLTE1IGF0IDE5OjQ0ICswMTAwLCBNYXR0aGlhcyBCcnVnZ2VyIHdyb3Rl Og0KPiBUaGFua3MgZm9yIHlvdXIgcGF0Y2guDQo+IA0KPiBPbiAxNS8wMy8yMDIwIDE2OjA4LCBI YW5rcyBDaGVuIHdyb3RlOg0KPiA+IFtEZXRhaWxdDQo+IA0KPiBUaGlzIGxpbmUgaXMgbm90IG5l ZWRlZC4NCmdvdCBpdCwgd2lsbCBmaXggaXQuIFRoYW5rcyBmb3IgcmV2aWV3aW5nLg0KDQo+IA0K PiA+IEFkZCBhcm0gY3B1IHR5cGUgY29ydGV4LWE3NS4NCj4gPiANCj4gPiBDaGFuZ2UtSWQ6IEky YjA1OTQ4OTE1YWNmYTZhMDRhMGI4ZmE4ODY4NGExMmI2ZDVjMmNhDQo+IA0KPiBObyBDaGFuZ2Ut SWQgaW4gdXBzdHJlYW0ga2VybmVsIHBhdGNoZXMgcGxlYXNlLg0KPiANCmdvdCBpdCwgd2lsbCBm aXggaXQuIFRoYW5rcyBmb3IgcmV2aWV3aW5nLg0KDQo+ID4gU2lnbmVkLW9mZi1ieTogSGFua3Mg Q2hlbiA8aGFua3MuY2hlbkBtZWRpYXRlay5jb20+DQo+ID4gLS0tDQo+ID4gIERvY3VtZW50YXRp b24vZGV2aWNldHJlZS9iaW5kaW5ncy9hcm0vY3B1cy55YW1sIHwgICAgMSArDQo+ID4gIDEgZmls ZSBjaGFuZ2VkLCAxIGluc2VydGlvbigrKQ0KPiA+IA0KPiA+IGRpZmYgLS1naXQgYS9Eb2N1bWVu dGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvYXJtL2NwdXMueWFtbCBiL0RvY3VtZW50YXRpb24v ZGV2aWNldHJlZS9iaW5kaW5ncy9hcm0vY3B1cy55YW1sDQo+ID4gaW5kZXggYzIzYzI0Zi4uNTFi NzVmNyAxMDA2NDQNCj4gPiAtLS0gYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mv YXJtL2NwdXMueWFtbA0KPiA+ICsrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5n cy9hcm0vY3B1cy55YW1sDQo+ID4gQEAgLTEyOCw2ICsxMjgsNyBAQCBwcm9wZXJ0aWVzOg0KPiA+ ICAgICAgICAtIGFybSxjb3J0ZXgtYTU3DQo+ID4gICAgICAgIC0gYXJtLGNvcnRleC1hNzINCj4g PiAgICAgICAgLSBhcm0sY29ydGV4LWE3Mw0KPiA+ICsgICAgICAtIGFybSxjb3J0ZXgtYTc1DQo+ ID4gICAgICAgIC0gYXJtLGNvcnRleC1tMA0KPiA+ICAgICAgICAtIGFybSxjb3J0ZXgtbTArDQo+ ID4gICAgICAgIC0gYXJtLGNvcnRleC1tMQ0KPiA+IA0KPiANCj4gX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18NCj4gTGludXgtbWVkaWF0ZWsgbWFpbGluZyBs aXN0DQo+IExpbnV4LW1lZGlhdGVrQGxpc3RzLmluZnJhZGVhZC5vcmcNCj4gaHR0cDovL2xpc3Rz LmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1tZWRpYXRlaw0KDQo=