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[209.132.180.67]) by mx.google.com with ESMTP id 94si1527684otb.114.2020.03.17.06.34.33; Tue, 17 Mar 2020 06:34:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=g3CzeVFO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726521AbgCQNeB (ORCPT + 99 others); Tue, 17 Mar 2020 09:34:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:46368 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726148AbgCQNeA (ORCPT ); Tue, 17 Mar 2020 09:34:00 -0400 Received: from mail-ed1-f52.google.com (mail-ed1-f52.google.com [209.85.208.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 46A0A2075E; Tue, 17 Mar 2020 13:33:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1584452039; bh=ubR0JrKy3jQmSPnc1EN0k8pifk/MO4gNg2fiNHZs1bk=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=g3CzeVFOQaYZV9EheV69Kl+xkmd1VoLN2Wadwenh/r8KcYQ60hrSyk5Lbn1PK30sK Q4CytD2x0XH9MlGQyMissAw5uULD8w7X0phEjWX4dUJ3mwTh0hyJBtx8vSnjEQwCA+ fIzjtRVSvLR0Q2zQu2wOaLp/d2c1uYoZYTgUNpwk= Received: by mail-ed1-f52.google.com with SMTP id v6so11328153edw.8; Tue, 17 Mar 2020 06:33:59 -0700 (PDT) X-Gm-Message-State: ANhLgQ3pjZsVoNxCWV1kGT/PaMUH0PhXG9Xu5tNjK/JMr9FdK8+dUOLH BSMcceHzfMa48TDB2d8Y131I9dQSa7Q2d4FFrw== X-Received: by 2002:a17:906:4bc3:: with SMTP id x3mr4209614ejv.38.1584452037617; Tue, 17 Mar 2020 06:33:57 -0700 (PDT) MIME-Version: 1.0 References: <20200311071823.117899-1-jitao.shi@mediatek.com> <20200311071823.117899-2-jitao.shi@mediatek.com> In-Reply-To: From: Chun-Kuang Hu Date: Tue, 17 Mar 2020 21:33:46 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v13 1/6] dt-bindings: media: add pclk-sample dual edge property To: Neil Armstrong , Jitao Shi Cc: Rob Herring , Mark Rutland , Matthias Brugger , Daniel Vetter , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, srv_heupstream@mediatek.com, huijuan.xie@mediatek.com, stonea168@163.com, cawa.cheng@mediatek.com, linux-mediatek@lists.infradead.org, yingjoe.chen@mediatek.com, eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Jitao: I agree with Neil, so please base on Boris' effort to negotiate with bridge= . Regards, Chun-Kuang Hu Neil Armstrong =E6=96=BC 2020=E5=B9=B43=E6=9C=881= 1=E6=97=A5 =E9=80=B1=E4=B8=89 =E4=B8=8B=E5=8D=889:53=E5=AF=AB=E9=81=93=EF= =BC=9A > > Hi, > > On 11/03/2020 08:18, Jitao Shi wrote: > > Some chips's sample mode are rising, falling and dual edge (both > > falling and rising edge). > > Extern the pclk-sample property to support dual edge. > > > > Acked-by: Rob Herring > > Reviewed-by: CK Hu > > Signed-off-by: Jitao Shi > > --- > > Documentation/devicetree/bindings/media/video-interfaces.txt | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/media/video-interfaces.t= xt b/Documentation/devicetree/bindings/media/video-interfaces.txt > > index f884ada0bffc..da9ad24935db 100644 > > --- a/Documentation/devicetree/bindings/media/video-interfaces.txt > > +++ b/Documentation/devicetree/bindings/media/video-interfaces.txt > > @@ -118,8 +118,8 @@ Optional endpoint properties > > - data-enable-active: similar to HSYNC and VSYNC, specifies the data e= nable > > signal polarity. > > - field-even-active: field signal level during the even field data tra= nsmission. > > -- pclk-sample: sample data on rising (1) or falling (0) edge of the pi= xel clock > > - signal. > > +- pclk-sample: sample data on rising (1), falling (0) or both rising a= nd > > + falling (2) edge of the pixel clock signal. > > - sync-on-green-active: active state of Sync-on-green (SoG) signal, 0/= 1 for > > LOW/HIGH respectively. > > - data-lanes: an array of physical data lane indexes. Position of an e= ntry > > > > This changes the bus format, but we recently introduced a bus format nego= ciation > between bridges to avoid adding such properties into DT, and make bus for= mat setup > dynamic between an encoder and a bridge. > > It would be great to use that instead. > > Neil > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel