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Subject: Re: [PATCH 2/2] arm64: dts: qcom: sc7180: Fix cpu compatible
To:     Amit Kucheria <amit.kucheria@linaro.org>,
        linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
        bjorn.andersson@linaro.org, sibis@codeaurora.org,
        swboyd@chromium.org, dianders@chromium.org,
        Andy Gross <agross@kernel.org>
Cc:     devicetree@vger.kernel.org
References: <cd0f3d35ca0fc2944fd97e030a28318ff82dd5c1.1584516925.git.amit.kucheria@linaro.org>
 <2526d2b2907116d1bb6f7edd194226eb7e24c333.1584516925.git.amit.kucheria@linaro.org>
From:   Rajendra Nayak <rnayak@codeaurora.org>
Message-ID: <f78414f8-01c7-1274-14ae-a0222a8f636a@codeaurora.org>
Date:   Thu, 19 Mar 2020 14:03:36 +0530
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On 3/18/2020 2:38 PM, Amit Kucheria wrote:
> "arm,armv8" compatible should only be used for software models. Replace
> it with the real cpu type.
> 
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>

>   arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 8011c5fe2a31..a01dfefd90be 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -83,7 +83,7 @@
>   
>   		CPU0: cpu@0 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x0>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_0>;
> @@ -100,7 +100,7 @@
>   
>   		CPU1: cpu@100 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x100>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_100>;
> @@ -114,7 +114,7 @@
>   
>   		CPU2: cpu@200 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x200>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_200>;
> @@ -128,7 +128,7 @@
>   
>   		CPU3: cpu@300 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x300>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_300>;
> @@ -142,7 +142,7 @@
>   
>   		CPU4: cpu@400 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x400>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_400>;
> @@ -156,7 +156,7 @@
>   
>   		CPU5: cpu@500 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x500>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_500>;
> @@ -170,7 +170,7 @@
>   
>   		CPU6: cpu@600 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x600>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_600>;
> @@ -184,7 +184,7 @@
>   
>   		CPU7: cpu@700 {
>   			device_type = "cpu";
> -			compatible = "arm,armv8";
> +			compatible = "qcom,kryo468";
>   			reg = <0x0 0x700>;
>   			enable-method = "psci";
>   			next-level-cache = <&L2_700>;
> 

-- 
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