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[209.132.180.67]) by mx.google.com with ESMTP id u64si171143oig.238.2020.03.19.01.49.42; Thu, 19 Mar 2020 01:49:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727259AbgCSIsO (ORCPT + 99 others); Thu, 19 Mar 2020 04:48:14 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:59767 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727045AbgCSIsA (ORCPT ); Thu, 19 Mar 2020 04:48:00 -0400 Received: from [5.158.153.53] (helo=tip-bot2.lab.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1jEqqJ-000327-GX; Thu, 19 Mar 2020 09:47:55 +0100 Received: from [127.0.1.1] (localhost [IPv6:::1]) by tip-bot2.lab.linutronix.de (Postfix) with ESMTP id 7CB381C2298; Thu, 19 Mar 2020 09:47:52 +0100 (CET) Date: Thu, 19 Mar 2020 08:47:52 -0000 From: "tip-bot2 for Lokesh Vutla" Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: timers/core] clocksource/drivers/timer-ti-dm: Do not update counter on updating the period Cc: Lokesh Vutla , Tony Lindgren , Daniel Lezcano , x86 , LKML In-Reply-To: <20200224050753.17784-3-lokeshvutla@ti.com> References: <20200224050753.17784-3-lokeshvutla@ti.com> MIME-Version: 1.0 Message-ID: <158460767223.28353.3956921614051586529.tip-bot2@tip-bot2> X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the timers/core branch of tip: Commit-ID: 6ce4fcb015a1a1290ffafcf3554901b40f9322df Gitweb: https://git.kernel.org/tip/6ce4fcb015a1a1290ffafcf3554901b40f9322df Author: Lokesh Vutla AuthorDate: Mon, 24 Feb 2020 10:37:53 +05:30 Committer: Daniel Lezcano CommitterDate: Thu, 27 Feb 2020 10:26:23 +01:00 clocksource/drivers/timer-ti-dm: Do not update counter on updating the period Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value in Load register(OMAP_TIMER_LOAD_REG) into Counter register (OMAP_TIMER_COUNTER_REG). omap_dm_timer_set_load() writes into trigger register every time load register is updated. When timer is configured in pwm mode, this causes disruption in current pwm cycle, which is not expected especially when pwm is used as PPS signal for synchronized PTP clocks. So do not write into trigger register on updating the period. Signed-off-by: Lokesh Vutla Tested-by: Tony Lindgren Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200224050753.17784-3-lokeshvutla@ti.com --- drivers/clocksource/timer-ti-dm.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 269a994..acc9360 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -577,7 +577,6 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); - omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); /* Save the context */ timer->context.tclr = l; timer->context.tldr = load;