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Subject: Re: [PATCH v5 23/23] KVM: arm64: GICv4.1: Expose HW-based SGIs in
 debugfs
To:     Marc Zyngier <maz@kernel.org>
Cc:     linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu,
        kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Jason Cooper <jason@lakedaemon.net>,
        Robert Richter <rrichter@marvell.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Zenghui Yu <yuzenghui@huawei.com>,
        James Morse <james.morse@arm.com>,
        Julien Thierry <julien.thierry.kdev@gmail.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>
References: <20200304203330.4967-1-maz@kernel.org>
 <20200304203330.4967-24-maz@kernel.org>
 <4cb4c3d4-7b02-bb77-cd7a-c185346b6a2f@redhat.com>
 <45c282bddd43420024633943c1befac3@kernel.org>
 <33576d89-2b12-b98b-e392-3342b9b1265c@redhat.com>
 <17921081f98a589c67b37b1d07a9cfcc@kernel.org>
From:   Auger Eric <eric.auger@redhat.com>
Message-ID: <791e08fc-417c-e956-1a41-0c605f7617b7@redhat.com>
Date:   Thu, 19 Mar 2020 17:17:48 +0100
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Hi,

On 3/19/20 5:16 PM, Marc Zyngier wrote:
> Hi Eric,
>=20
> On 2020-03-19 15:43, Auger Eric wrote:
>> Hi Marc,
>>
>> On 3/19/20 4:21 PM, Marc Zyngier wrote:
>>> Hi Eric,
>=20
> [...]
>=20
>>>> The patch looks good to me but I am now lost about how we retrieve t=
he
>>>> pending stat of other hw mapped interrupts. Looks we use
>>>> irq->pending_latch always. Is that correct?
>>>
>>> Correct. GICv4.0 doesn't give us an architectural way to look at the
>>> vLPI pending state (there isn't even a guarantee about when the GIC
>>> will stop writing to memory, if it ever does).
>>>
>>> With GICv4.1, you can introspect the HW state for SGIs. You can also
>>> look at the vLPI state by peeking at the virtual pending table, but
>>> you'd need to unmap the VPE first, which I obviously don't want to do
>>> for this debug interface, specially as it can be used whilst the gues=
t
>>> is up and running.
>> OK for vLPIs, what about other HW mapped IRQs (arch timer?)
>=20
> Different kind of HW. With those, the injection is still virtual, so th=
e
> SW pending bit is still very much valid. You can actually try and make
> the timer interrupt pending, it should show up.
>=20
> What the irq->hw bit means is "this virtual interrupt is somehow relate=
d
> to the host_irq". How this is interpreted is completely context-depende=
nt.
OK thank you for refreshing my memories ;-)

Eric
>=20
> Thanks,
>=20
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 M.