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[209.132.180.67]) by mx.google.com with ESMTP id v126si1283914oia.106.2020.03.19.09.26.23; Thu, 19 Mar 2020 09:26:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727783AbgCSQYm (ORCPT + 99 others); Thu, 19 Mar 2020 12:24:42 -0400 Received: from 8bytes.org ([81.169.241.247]:53948 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727217AbgCSQYm (ORCPT ); Thu, 19 Mar 2020 12:24:42 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id 9C464217; Thu, 19 Mar 2020 17:24:40 +0100 (CET) Date: Thu, 19 Mar 2020 17:24:39 +0100 From: Joerg Roedel To: Andy Lutomirski Cc: X86 ML , "H. Peter Anvin" , Dave Hansen , Peter Zijlstra , Thomas Hellstrom , Jiri Slaby , Dan Williams , Tom Lendacky , Juergen Gross , Kees Cook , LKML , kvm list , Linux Virtualization , Joerg Roedel Subject: Re: [PATCH 41/70] x86/sev-es: Add Runtime #VC Exception Handler Message-ID: <20200319162439.GE5122@8bytes.org> References: <20200319091407.1481-1-joro@8bytes.org> <20200319091407.1481-42-joro@8bytes.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 19, 2020 at 08:44:03AM -0700, Andy Lutomirski wrote: > On Thu, Mar 19, 2020 at 2:14 AM Joerg Roedel wrote: > > > > From: Tom Lendacky > > > > Add the handler for #VC exceptions invoked at runtime. > > If I read this correctly, this does not use IST. If that's true, I > don't see how this can possibly work. There at least two nasty cases > that come to mind: > > 1. SYSCALL followed by NMI. The NMI IRET hack gets to #VC and we > explode. This is fixable by getting rid of the NMI EFLAGS.TF hack. Not an issue in this patch-set, the confusion comes from the fact that I left some parts of the single-step-over-iret code in the patch. But it is not used. The NMI handling in this patch-set sends the NMI-complete message before the IRET, when the kernel is still in a safe environment (kernel stack, kernel cr3). > 2. tools/testing/selftests/x86/mov_ss_trap_64. User code does MOV > (addr), SS; SYSCALL, where addr has a data breakpoint. We get #DB > promoted to #VC with no stack. Also not an issue, as debugging is not supported at the moment in SEV-ES guests (hardware has no way yet to save/restore the debug registers across #VMEXITs). But this will change with future hardware. If you look at the implementation for dr7 read/write events, you see that the dr7 value is cached and returned, but does not make it to the hardware dr7. I though about using IST for the #VC handler, but the implications for nesting #VC handlers made me decide against it. But for future hardware that supports debugging inside SEV-ES guests it will be an issue. I'll think about how to fix the problem, it probably has to be IST :( Regards, Joerg