Received: by 2002:a25:6193:0:0:0:0:0 with SMTP id v141csp671522ybb; Fri, 20 Mar 2020 06:13:49 -0700 (PDT) X-Google-Smtp-Source: ADFU+vs3OKsz/cffz+hCmmtbi9jgWLsetd7RzbdasLKlg0TyFD5F0f7LPEO5KVzBQAfoax0gUNIw X-Received: by 2002:aca:af97:: with SMTP id y145mr6119891oie.24.1584710028939; Fri, 20 Mar 2020 06:13:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1584710028; cv=none; d=google.com; s=arc-20160816; b=vmTaIkBI4267+r3cC5TroxLndv6l86fY2iy0tZvOh/Ugbh3pdpOBFWUSHIvFmOV01b FtjSZdcd7baGC6vRMUW9YMX13iyB13ejrPWc4uw+Z8B6it02bT5kDG120HkOzmhTX3oo wSLQk7hk+45aSTwhXaBDUVSNSnMQJQ0K92B4hnDUQJ672bf+xVtR/lgOxcb2nxmxs4SK FDz1YoZpGYDo02IfXBQgWwbyPhtStvnNpUDoy9GiCEq2N4vnZABctpo5UrKow3SW0heu sisXchuvEElEk0tJTnw29bIX+i0E5iEcmPaqPPZHYQICborwE4VrV/PmjQVEs/Z7osp0 BnEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=IHshhxtsa2kn0tSZo6X75a77m0csDT6gyJ+f+DwYO9U=; b=dSNZ06XLPh5bn2JfRsgTkpwhlGI9YdnHXPu6d8hXeFX6vcttO2e95G47795NcPPLpO B1vfrU/xA5kZY5ItPPeRpFbhagZdo9Q5EPH/h5y22ePNVDF/LARNP1qXEFG8gq4n8T1R kMuNyeaq3UelBO8Up2UhzTyCdRTZD+03jjfsdd7XMbJgQuL+bPXN+u59AafCfZJsaNtk SVAmG862PLB+Xqotpa0Hr04wtRsDOLrZOfkB+MAx13zwoQ399zzXIxEKmtgt9dcfbJOJ eHV1tvjC2Yq4pGgQhZAQk8jaOoXPSQMsbS7hfC7GSfF6rdqpyDQx2/XQ6GfnszewgLB/ ZvPg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f111si2854429otf.245.2020.03.20.06.13.23; Fri, 20 Mar 2020 06:13:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727152AbgCTNMU (ORCPT + 99 others); Fri, 20 Mar 2020 09:12:20 -0400 Received: from alexa-out-blr-01.qualcomm.com ([103.229.18.197]:28294 "EHLO alexa-out-blr-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726902AbgCTNMU (ORCPT ); Fri, 20 Mar 2020 09:12:20 -0400 Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by alexa-out-blr-01.qualcomm.com with ESMTP/TLS/AES256-SHA; 20 Mar 2020 18:41:25 +0530 Received: from mkrishn-linux.qualcomm.com ([10.204.66.35]) by ironmsg02-blr.qualcomm.com with ESMTP; 20 Mar 2020 18:41:07 +0530 Received: by mkrishn-linux.qualcomm.com (Postfix, from userid 438394) id C1C1A4509; Fri, 20 Mar 2020 18:41:06 +0530 (IST) From: Krishna Manikandan To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Krishna Manikandan , linux-kernel@vger.kernel.org, robdclark@gmail.com, seanpaul@chromium.org, hoegsberg@chromium.org, kalyan_t@codeaurora.org, nganji@codeaurora.org Subject: [v3] arm64: dts: sc7180: modify assigned clocks for sc7180 target Date: Fri, 20 Mar 2020 18:41:04 +0530 Message-Id: <1584709864-5587-1-git-send-email-mkrishn@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DISP_CC_MDSS_ROT_CLK and DISP_CC_MDSS_AHB_CLK in the assigned clocks list as these are display specific clocks and needs to be initialized from the client side. Adding the default rate of 19.2 mhz for these clocks for sc7180 target. Signed-off-by: Krishna Manikandan Changes in v3: - Change in commit message --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 998f101..e3b60f1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1544,8 +1544,12 @@ clock-names = "iface", "rot", "lut", "core", "vsync"; assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>; assigned-clock-rates = <300000000>, + <19200000>, + <19200000>, <19200000>; interrupt-parent = <&mdss>; -- 1.9.1