Received: by 2002:a25:6193:0:0:0:0:0 with SMTP id v141csp866722ybb; Fri, 20 Mar 2020 09:20:38 -0700 (PDT) X-Google-Smtp-Source: ADFU+vuy6GfFpfuWYRVJ1YPNosz071yTdXxMjPDpc4kQVszJo0QjI58IoenP/qsr7YOoA49EVVbc X-Received: by 2002:a05:6830:2246:: with SMTP id t6mr7578778otd.46.1584721237928; Fri, 20 Mar 2020 09:20:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1584721237; cv=none; d=google.com; s=arc-20160816; b=oTpZFvh0P2EmYnysGWWz6v8/xkMIC5iDDq2b5jxUjvkUFG1caNFtwYIDmyJYBOohwr lUTb56ZOLne3mmG2jKxX0wzmSLi0T1Tsf77qynQeweQOGktwjPN4T146igqio1oH0KRt O813NNwsX8JXUGyieU8UhreP9YtRT82Ieifmdk167GF5MwHXzpmigpqeMcn1R3I4G9/E hpR3sEENNsKjg4t/7hVywXLH5Wt53wPKbp3DFWCKiHZvZP9EXAF6xyENJu+OzUP9lkMx oJcjXr0Ngzru7Cl3QJNYtgeZ0wyiY+rZWuVmwmy0XPlQ2ePmYl9crrA1R6kdqJvsrf9R DnCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=S/DXlI3P2nbMXd69cOy84aTZ0SIJNFmNoyde3hKd4Ew=; b=QBsoqRYDYJXgOHX9vML+5EaLtwFJG4Up0EEv6N5gAEwLmWNGSZYKBztg9U3oR3vuH9 uTtxjvAHk/+IqNSkw2sd85Evsqvrr9pWErpAsgmcWd/rHEh2b9OED63j6ZU8t54TmcWA lutWCoBsTYeaARbYjxXZo9ZBVMtGSMGkjXJ9PscP8voJY6RPAHeEv4Zf3nIWuSk+2hyE XE+zemcTpON//tosl0h3h/tHyNGbLlZuexvu65wAy5JtyNAfZ6Ht2QGCCxc/AyeiHBlK P3/E2nRAhyixbzdYesIiUcxbkzmjL5eeBsc1+qjX9uW2nw7ZSMBfTC8PBI/p4fqoWfj0 RWXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=ZwmBPFyi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u7si2898908otq.323.2020.03.20.09.20.20; Fri, 20 Mar 2020 09:20:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=ZwmBPFyi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727492AbgCTQT5 (ORCPT + 99 others); Fri, 20 Mar 2020 12:19:57 -0400 Received: from us-smtp-delivery-74.mimecast.com ([63.128.21.74]:27321 "EHLO us-smtp-delivery-74.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726801AbgCTQT5 (ORCPT ); Fri, 20 Mar 2020 12:19:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1584721196; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=S/DXlI3P2nbMXd69cOy84aTZ0SIJNFmNoyde3hKd4Ew=; b=ZwmBPFyi7NNjhf//bvEydqBYoSezMeP+s4B07iPZw7igmuLQU7L9csoOkHcnM9Dg6DATFf V4fH7WflmmehUYjwMu4Eloi5VxXuPfEFYwL2rpCU3SANUyIdEbIaEZmN25GqnI1WACMyhT N7FaZ4GzBaMmCkK1/jFf/CX9HEoQArM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-126-g-dTOvKOMhqkiKp88uLICg-1; Fri, 20 Mar 2020 12:19:52 -0400 X-MC-Unique: g-dTOvKOMhqkiKp88uLICg-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 44A79934C59; Fri, 20 Mar 2020 16:19:25 +0000 (UTC) Received: from laptop.redhat.com (ovpn-113-142.ams2.redhat.com [10.36.113.142]) by smtp.corp.redhat.com (Postfix) with ESMTP id 487BA60BFB; Fri, 20 Mar 2020 16:19:13 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, joro@8bytes.org, alex.williamson@redhat.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, jean-philippe.brucker@arm.com, will.deacon@arm.com, robin.murphy@arm.com Cc: marc.zyngier@arm.com, peter.maydell@linaro.org, zhangfei.gao@gmail.com Subject: [PATCH v10 00/11] SMMUv3 Nested Stage Setup (VFIO part) Date: Fri, 20 Mar 2020 17:19:00 +0100 Message-Id: <20200320161911.27494-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series brings the VFIO part of HW nested paging support in the SMMUv3. This is a rebase on top of Will's arm-smmu-updates branch (git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git tags/arm-sm= mu-updates) This is basically a resend of v9 as patches still applied. This work has been stalled since Plumber 2019. Since then some users expressed interest in that work and tested v9: - https://patchwork.kernel.org/cover/11039995/#23012381 - https://patchwork.kernel.org/cover/11039995/#23197235 The series depends on: [PATCH v10 00/13] SMMUv3 Nested Stage Setup (IOMMU part) 3 new IOCTLs are introduced that allow the userspace to 1) pass the guest stage 1 configuration 2) pass stage 1 MSI bindings 3) invalidate stage 1 related caches They map onto the related new IOMMU API functions. We introduce the capability to register specific interrupt indexes (see [1]). A new DMA_FAULT interrupt index allows to register an eventfd to be signaled whenever a stage 1 related fault is detected at physical level. Also a specific region allows to expose the fault records to the user space. Best Regards Eric This series can be found at: https://github.com/eauger/linux/tree/will-arm-smmu-updates-2stage-v10 It series includes Tina's patch steming from [1] "[RFC PATCH v2 1/3] vfio: Use capability chains to handle device specific irq" plus patches originally contributed by Yi. History: v9 -> v10 - rebase on top of 5.6.0-rc3 (no change versus v9) v8 -> v9: - introduce specific irq framework - single fault region - iommu_unregister_device_fault_handler failure case not handled yet. v7 -> v8: - rebase on top of v5.2-rc1 and especially 8be39a1a04c1 iommu/arm-smmu-v3: Add a master->domain pointer - dynamic alloc of s1_cfg/s2_cfg - __arm_smmu_tlb_inv_asid/s1_range_nosync - check there is no HW MSI regions - asid invalidation using pasid extended struct (change in the uapi) - add s1_live/s2_live checks - move check about support of nested stages in domain finalise - fixes in error reporting according to the discussion with Robin - reordered the patches to have first iommu/smmuv3 patches and then VFIO patches v6 -> v7: - removed device handle from bind/unbind_guest_msi - added "iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement" - added few uapi comments as suggested by Jean, Jacop and Alex v5 -> v6: - Fix compilation issue when CONFIG_IOMMU_API is unset v4 -> v5: - fix bug reported by Vincent: fault handler unregistration now happens i= n vfio_pci_release - IOMMU_FAULT_PERM_* moved outside of struct definition + small uapi changes suggested by Kean-Philippe (except fetch_addr) - iommu: introduce device fault report API: removed the PRI part. - see individual logs for more details - reset the ste abort flag on detach v3 -> v4: - took into account Alex, jean-Philippe and Robin's comments on v3 - rework of the smmuv3 driver integration - add tear down ops for msi binding and PASID table binding - fix S1 fault propagation - put fault reporting patches at the beginning of the series following Jean-Philippe's request - update of the cache invalidate and fault API uapis - VFIO fault reporting rework with 2 separate regions and one mmappable segment for the fault queue - moved to PATCH v2 -> v3: - When registering the S1 MSI binding we now store the device handle. Thi= s addresses Robin's comment about discimination of devices beonging to different S1 groups and using different physical MSI doorbells. - Change the fault reporting API: use VFIO_PCI_DMA_FAULT_IRQ_INDEX to set the eventfd and expose the faults through an mmappable fault region v1 -> v2: - Added the fault reporting capability - asid properly passed on invalidation (fix assignment of multiple devices) - see individual change logs for more info Eric Auger (8): vfio: VFIO_IOMMU_SET_MSI_BINDING vfio/pci: Add VFIO_REGION_TYPE_NESTED region type vfio/pci: Register an iommu fault handler vfio/pci: Allow to mmap the fault queue vfio: Add new IRQ for DMA fault reporting vfio/pci: Add framework for custom interrupt indices vfio/pci: Register and allow DMA FAULT IRQ signaling vfio: Document nested stage control Liu, Yi L (2): vfio: VFIO_IOMMU_SET_PASID_TABLE vfio: VFIO_IOMMU_CACHE_INVALIDATE Tina Zhang (1): vfio: Use capability chains to handle device specific irq Documentation/driver-api/vfio.rst | 77 ++++++++ drivers/vfio/pci/vfio_pci.c | 283 ++++++++++++++++++++++++++-- drivers/vfio/pci/vfio_pci_intrs.c | 62 ++++++ drivers/vfio/pci/vfio_pci_private.h | 24 +++ drivers/vfio/pci/vfio_pci_rdwr.c | 45 +++++ drivers/vfio/vfio_iommu_type1.c | 166 ++++++++++++++++ include/uapi/linux/vfio.h | 109 ++++++++++- 7 files changed, 747 insertions(+), 19 deletions(-) --=20 2.20.1