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Subject: Re: [PATCH 4/6] arm64/cpufeature: Define an explicit ftr_id_isar0[]
 for ID_ISAR0 register
To:     anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org
Cc:     catalin.marinas@arm.com, will@kernel.org,
        linux-kernel@vger.kernel.org
References: <1580215149-21492-1-git-send-email-anshuman.khandual@arm.com>
 <1580215149-21492-5-git-send-email-anshuman.khandual@arm.com>
From:   Suzuki K Poulose <suzuki.poulose@arm.com>
Message-ID: <54de9128-c947-4f68-7646-4261adde7f36@arm.com>
Date:   Fri, 20 Mar 2020 18:16:54 +0000
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On 01/28/2020 12:39 PM, Anshuman Khandual wrote:
> ID_ISAR0[31..28] bits are RES0 in ARMv8, Reserved/UNK in ARMv7. Currently
> these bits get exposed through generic_id_ftr32[] which is not desirable.
> Hence define an explicit ftr_id_isar0[] array for ID_ISAR0 register where
> those bits can be hidden.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>