Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
IronPort-SDR: IqgRZ9eInJ+Lg6PQgretw86mI8FCDaZHXWa2mhYrSQXlStrmKF/DOTSQWWeiFdsnKCoSRAsnZD
 e+QT2XwGOnkw==
IronPort-SDR: AI7mwcti47a8zY7rP3T1HAx+cm976cqmpmY2xAgIvuvrNZR3O5/Vwl2QZHRfC+y4J7PTcl4dfB
 luJrNVfdt3Hw==
From:   "Voon, Weifeng" <weifeng.voon@intel.com>
To:     Jose Abreu <Jose.Abreu@synopsys.com>,
        "David S . Miller" <davem@davemloft.net>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>
CC:     "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Giuseppe Cavallaro" <peppe.cavallaro@st.com>,
        Andrew Lunn <andrew@lunn.ch>,
        "Alexandre Torgue" <alexandre.torgue@st.com>,
        "Ong, Boon Leong" <boon.leong.ong@intel.com>
Subject: RE: [RFC,net-next,v1, 1/1] net: stmmac: Enable SERDES power up/down
 sequence
Thread-Topic: [RFC,net-next,v1, 1/1] net: stmmac: Enable SERDES power up/down
 sequence
Thread-Index: AQHWAE0vpBWvWDPaGkGozDEPMDm2A6hVzcSAgAAFr0A=
Date:   Mon, 23 Mar 2020 08:16:29 +0000
Message-ID: <BYAPR11MB27575EF05D65A8AA9AF4128488F00@BYAPR11MB2757.namprd11.prod.outlook.com>
References: <20200322132342.2687-1-weifeng.voon@intel.com>
 <20200322132342.2687-2-weifeng.voon@intel.com>
 <BN8PR12MB3266ACFFA4808A133BB72F9DD3F00@BN8PR12MB3266.namprd12.prod.outlook.com>
In-Reply-To: <BN8PR12MB3266ACFFA4808A133BB72F9DD3F00@BN8PR12MB3266.namprd12.prod.outlook.com>
Accept-Language: en-US
Content-Language: en-US
dlp-version: 11.2.0.6
dlp-product: dlpe-windows
dlp-reaction: no-action
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: ef479fb2-e056-4be2-e55b-08d7cf027d81
X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Mar 2020 08:16:29.7564
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: dFLWThUk5g6k87yGS4Hkra9rORQWJqljmILEucZ5oEMjTqQ2WdbD5TrimQaXEHJ9bEpo10bHWcrw7D8kEfiYjw==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3192
X-OriginatorOrg: intel.com
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

> > This patch is to enable Intel SERDES power up/down sequence. The
> > SERDES converts 8/10 bits data to SGMII signal. Below is an example of
> > HW configuration for SGMII mode. The SERDES is located in the PHY IF
> > in the diagram below.
> >
> > <-----------------GBE Controller---------->|<--External PHY chip-->
> > +----------+         +----+            +---+           +----------+
> > |   EQoS   | <-GMII->| DW | < ------ > |PHY| <-SGMII-> | External |
> > |   MAC    |         |xPCS|            |IF |           | PHY      |
> > +----------+         +----+            +---+           +----------+
> >        ^               ^                 ^                ^
> >        |               |                 |                |
> >        +---------------------MDIO-------------------------+
> >
> > PHY IF configuration and status registers are accessible through mdio
> > address 0x15 which is defined as intel_adhoc_addr. During D0, The
> > driver will need to power up PHY IF by changing the power state to P0.
> > Likewise, for D3, the driver sets PHY IF power state to P3.
>=20
> I don't think this is the right approach.
>=20
> You could just add a new "mdio-intel-serdes" to phy/ folder just like I
> did with XPCS because this is mostly related with PHY settings rather
> than EQoS.
I am taking this approach to put it in stmmac folder rather than phy folder
as a generic mdio-intel-serdes as this is a specific Intel serdes architect=
ure which
would only pair with DW EQos and DW xPCS HW. Since this serdes will not abl=
e to
pair other MAC or other non-Intel platform, I would like you to reconsider =
this
approach. I am open for discussion.=20
Thanks Jose for the fast response.

Regards,
Weifeng =20

>=20
> Perhaps Andrew has better insight on this.
>=20
> BTW, are you using the standard XPCS helpers in phy/ folder ? Is it
> working fine for you ?
>=20
> ---
> Thanks,
> Jose Miguel Abreu