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[209.132.180.67]) by mx.google.com with ESMTP id v19si3389297otn.322.2020.03.24.04.03.38; Tue, 24 Mar 2020 04:03:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ylxzySaS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727317AbgCXLBI (ORCPT + 99 others); Tue, 24 Mar 2020 07:01:08 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:47122 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727272AbgCXLBE (ORCPT ); Tue, 24 Mar 2020 07:01:04 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 02OB13Yr096484; Tue, 24 Mar 2020 06:01:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1585047663; bh=wOIHErMxL1dPyYZfKUvJnu7iEy+6pilAb2hSRDMFoKk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ylxzySaS8DXQVomUmLUvct8+jVhGbB7xPuIkFSl5v/5aXofVEjsx9VwjO9iHC+hjv 7JEw7Mje3xmtZAcr8E66qyx9CATlfiM2g1zNkJn9BabzxzpvYClTrBVv8Ub7t8XwLY +UUfeARaVTmZkwZe/GhkZxpGT8l9eg00ChXvUdTs= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 02OB13UA037264 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 24 Mar 2020 06:01:03 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 24 Mar 2020 06:01:02 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 24 Mar 2020 06:01:02 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 02OB0rAn008648; Tue, 24 Mar 2020 06:01:00 -0500 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv9 03/15] remoteproc/omap: Add a sanity check for DSP boot address alignment Date: Tue, 24 Mar 2020 13:00:23 +0200 Message-ID: <20200324110035.29907-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200324110035.29907-1-t-kristo@ti.com> References: <20200324110035.29907-1-t-kristo@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The DSP remote processors on OMAP SoCs require a boot register to be programmed with a boot address, and this boot address needs to be on a 1KB boundary. The current code is simply masking the boot address appropriately without performing any sanity checks before releasing the resets. An unaligned boot address results in an undefined execution behavior and can result in various bus errors like MMU Faults or L3 NoC errors. Such errors are hard to debug and can be easily avoided by adding a sanity check for the alignment before booting a DSP remote processor. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson Reviewed-by: Andrew F. Davis Acked-by: Mathieu Poirier --- v9: * compiler warning fix on top of rproc-next drivers/remoteproc/omap_remoteproc.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index d47d5ded651a..fe11cb709770 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -121,14 +121,23 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) * @rproc: handle of a remote processor * * Set boot address for a supported DSP remote processor. + * + * Return: 0 on success, or -EINVAL if boot address is not aligned properly */ -static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; - regmap_write(bdata->syscon, offset, rproc->bootaddr); + if (rproc->bootaddr & (SZ_1K - 1)) { + dev_err(dev, "invalid boot address 0x%llx, must be aligned on a 1KB boundary\n", + rproc->bootaddr); + return -EINVAL; + } + + return regmap_write(bdata->syscon, offset, rproc->bootaddr); } /* @@ -145,8 +154,11 @@ static int omap_rproc_start(struct rproc *rproc) int ret; struct mbox_client *client = &oproc->client; - if (oproc->boot_data) - omap_rproc_write_dsp_boot_addr(rproc); + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) + return ret; + } client->dev = dev; client->tx_done = NULL; -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 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