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Date:   Wed, 25 Mar 2020 10:31:50 +0800
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Subject: Re: [PATCH v6 02/11] irqchip: loongson-liointc: Workaround LPC IRQ Errata
To:     Huacai Chen <chenhc@lemote.com>
CC:     "open list:MIPS" <linux-mips@vger.kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>,
        Marc Zyngier <maz@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Allison Randal <allison@lohutok.net>,
        LKML <linux-kernel@vger.kernel.org>, devicetree@vger.kernel.org
From:   Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <C87B57FD-F4C2-4464-9692-A28DE343FDDB@flygoat.com>
Sender: linux-kernel-owner@vger.kernel.org
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=E4=BA=8E 2020=E5=B9=B43=E6=9C=8825=E6=97=A5 GMT+08:00 =E4=B8=8A=E5=8D=889=
:52:26, Huacai Chen <chenhc@lemote=2Ecom> =E5=86=99=E5=88=B0:
>Hi, Jiaxun,
>
>On Tue, Mar 24, 2020 at 11:39 PM Jiaxun Yang <jiaxun=2Eyang@flygoat=2Ecom=
>
>wrote:
>>
>> The 1=2E0 version of that controller has a bug that status bit
>> of LPC IRQ sometimes doesn't get set correctly=2E
>>
>> So we can always blame LPC IRQ when spurious interrupt happens
>> at the parent interrupt line which LPC IRQ supposed to route
>> to=2E
>>
>> Co-developed-by: Huacai Chen <chenhc@lemote=2Ecom>
>> Signed-off-by: Jiaxun Yang <jiaxun=2Eyang@flygoat=2Ecom>
>> ---
>>  drivers/irqchip/irq-loongson-liointc=2Ec | 16 ++++++++++++++--
>>  1 file changed, 14 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/irqchip/irq-loongson-liointc=2Ec
>b/drivers/irqchip/irq-loongson-liointc=2Ec
>> index 8b6d7b8ddaca=2E=2Ed5054e90eab8 100644
>> --- a/drivers/irqchip/irq-loongson-liointc=2Ec
>> +++ b/drivers/irqchip/irq-loongson-liointc=2Ec
>> @@ -32,6 +32,8 @@
>>
>>  #define LIOINTC_SHIFT_INTx     4
>>
>> +#define LIOINTC_ERRATA_IRQ     10
>> +
>>  struct liointc_handler_data {
>>         struct liointc_priv     *priv;
>>         u32                     parent_int_map;
>> @@ -41,6 +43,7 @@ struct liointc_priv {
>>         struct irq_chip_generic         *gc;
>>         struct liointc_handler_data     handler[LIOINTC_NUM_PARENT];
>>         u8                              map_cache[LIOINTC_CHIP_IRQ];
>> +       bool                            have_lpc_irq_errata;
>Maybe has_lpc_irq_errata?

Fixed, thanks=2E

>
>>  };
>>
>>  static void liointc_chained_handle_irq(struct irq_desc *desc)
>> @@ -54,8 +57,14 @@ static void liointc_chained_handle_irq(struct
>irq_desc *desc)
>>
>>         pending =3D readl(gc->reg_base + LIOINTC_REG_INTC_STATUS);
>>
>> -       if (!pending)
>> -               spurious_interrupt();
>> +       if (!pending) {
>> +               /* Always blame LPC IRQ if we have that bug and LPC
>IRQ is enabled */
>> +               if (handler->priv->have_lpc_irq_errata &&
>> +                       (handler->parent_int_map & ~gc->mask_cache &
>BIT(LIOINTC_ERRATA_IRQ)))
>> +                       pending =3D BIT(LIOINTC_ERRATA_IRQ);
>> +               else
>> +                       spurious_interrupt();
>> +       }
>>
>>         while (pending) {
>>                 int bit =3D __ffs(pending);
>> @@ -164,6 +173,9 @@ int __init liointc_of_init(struct device_node
>*node,
>>                 goto out_iounmap;
>>         }
>>
>> +       if (of_device_is_compatible(node, "loongson,liointc-1=2E0"))
>> +               priv->have_lpc_irq_errata =3D true;
>> +
>>         sz =3D of_property_read_variable_u32_array(node,
>"loongson,parent_int_map",
>>                                               =20
>&of_parent_int_map[0], LIOINTC_NUM_PARENT,
>>                                                 LIOINTC_NUM_PARENT);
>> --
>> 2=2E26=2E0=2Erc2
>>
>>
>
>Regards,
>Huacai Chen

--=20
Jiaxun Yang