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Miller" , Greg Kroah-Hartman , Jonathan Cameron , Andy Shevchenko , Allison Randal , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Message-ID: <20200325035537.156911-6-jiaxun.yang@flygoat.com> Subject: [PATCH v8 05/11] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC Date: Wed, 25 Mar 2020 11:54:58 +0800 X-Mailer: git-send-email 2.26.0.rc2 In-Reply-To: <20200325035537.156911-1-jiaxun.yang@flygoat.com> References: <20200325035537.156911-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoCNMailClient: External Content-Type: text/plain; charset=utf8 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document Loongson-3 HyperTransport PIC controller. Signed-off-by: Jiaxun Yang Reviewed-by: Rob Herring Co-developed-by: Huacai Chen Signed-off-by: Huacai Chen --- .../interrupt-controller/loongson,htpic.yaml | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/= loongson,htpic.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongso= n,htpic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loong= son,htpic.yaml new file mode 100644 index 000000000000..c8861cbbb8b5 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic= .yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.ya= ml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Loongson-3 HyperTransport Interrupt Controller + +maintainers: + - Jiaxun Yang + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +description: | + This interrupt controller is found in the Loongson-3 family of chips to = transmit + interrupts from PCH PIC connected on HyperTransport bus. + +properties: + compatible: + const: loongson,htpic-1.0 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 4 + description: | + Four parent interrupts that receive chained interrupts. + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + #include + htintc: interrupt-controller@1fb000080 { + compatible =3D "loongson,htintc-1.0"; + reg =3D <0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells =3D <1>; + + interrupt-parent =3D <&liointc>; + interrupts =3D <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>; + }; +... --=20 2.26.0.rc2