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x-originating-ip: [92.121.36.197] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 90c51c9d-a5e3-4d69-21c0-08d7d0b7183e x-ms-traffictypediagnostic: VI1PR04MB5344:|VI1PR04MB5344: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:4941; x-forefront-prvs: 0353563E2B x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(136003)(366004)(376002)(396003)(346002)(39860400002)(2906002)(5660300002)(8676002)(81156014)(8936002)(81166006)(66946007)(52536014)(71200400001)(91956017)(76116006)(86362001)(66556008)(66476007)(33656002)(64756008)(66446008)(478600001)(4326008)(44832011)(186003)(6636002)(7696005)(55016002)(9686003)(26005)(53546011)(6506007)(316002)(54906003)(110136005);DIR:OUT;SFP:1101;SCL:1;SRVR:VI1PR04MB5344;H:VI1PR04MB6941.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: O01gT4VoW6J0+5DAtu88Qlp6boJR2W1/+26cHoxKortFF8CXfphCbRyG44yEUs5OHCmH42fBlX6oBH3eEREbLlG71NL0ua3B+QsEr4sqRJRT2sOpFm6+VI36vre/4zJlllMMhxq5R8GMflfXlD+K55zdwi+9nR3IKHwElqVTe7PkxF1w1Bqzz/sDbGVtBzV0Q6jRrtpNlNPaI8hkLEG2IDIxM70BJbQxN37LskkasDd1VhnsbGwRXQny7ahlSXv+fuLSvVs88rdG6IN08j4FQm8r/NRQUcXqkdC8rMNQ+kpJMeo/iS3UWw+xhyyygWZfHAHkx52RMhR7Kj2zLwsh8QjsbU0vbHzdYfU2ehVKAA1cDHsAQe2BWeR4onh2KQVMEYTKvVW07i84//QpKT8WZvfMuW0t4mp+VnkD0ahRwCNZ9rp0yfBamJRxcPnZIoPL x-ms-exchange-antispam-messagedata: Lqj8SZzGp5SA3MeKYPdi44TnPqxXe4seyui80iyi0l0cEcMzUn1RsMDk/kwH28aPrK1KKz/74VZ9n1Orgc2hGy0iE/c1vhdUnvDp+MGTant/J1A9WaLGVghE22MY98e0iKuFJR2W06AnkKW+Uq+/gw== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 90c51c9d-a5e3-4d69-21c0-08d7d0b7183e X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Mar 2020 12:21:49.8789 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: agI5BRr8Q/q1NLgXX3LxOphIBMCa3NpoFzlWJafFEGpRpvdM2bVvaFfXPvE+6KBjcXPJvl4VrnwF7Sf8I7MoBw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5344 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-03-24 8:48 PM, Michael Walle wrote:=0A= > If the kernel console output is on this console any=0A= > dev_{err,warn,info}() may result in a deadlock if the sport->port.lock=0A= > spinlock is already held. This is because the _console_write() try to=0A= > aquire this lock, too. Remove any error messages where the spinlock is=0A= > taken or print after the lock is released.=0A= > =0A= > Reported-by: Leonard Crestez =0A= > Signed-off-by: Michael Walle =0A= =0A= It seems that this was an issue even before commit 159381df1442 ("tty: =0A= serial: fsl_lpuart: fix DMA operation when using IOMMU") but these error = =0A= prints never triggered.=0A= =0A= Would it be possible to move all the dma alloc/config/prep outside the =0A= serial port lock? As it stands this still calls into dmaengine coode and = =0A= that might decide to print as well.=0A= =0A= Really I don't think the lock needs to protect more than bits like =0A= TDMAE/RDMAE.=0A= =0A= BTW: You should add more people in CC for reviews, for example =0A= linux-imx@nxp.com is checked by a lot of people.=0A= =0A= > ---=0A= > drivers/tty/serial/fsl_lpuart.c | 35 +++++++--------------------------= =0A= > 1 file changed, 7 insertions(+), 28 deletions(-)=0A= > =0A= > diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpu= art.c=0A= > index bbba298b68a4..0910308b38b1 100644=0A= > --- a/drivers/tty/serial/fsl_lpuart.c=0A= > +++ b/drivers/tty/serial/fsl_lpuart.c=0A= > @@ -420,7 +420,6 @@ static void lpuart_dma_tx(struct lpuart_port *sport)= =0A= > {=0A= > struct circ_buf *xmit =3D &sport->port.state->xmit;=0A= > struct scatterlist *sgl =3D sport->tx_sgl;=0A= > - struct device *dev =3D sport->port.dev;=0A= > struct dma_chan *chan =3D sport->dma_tx_chan;=0A= > int ret;=0A= > =0A= > @@ -442,10 +441,8 @@ static void lpuart_dma_tx(struct lpuart_port *sport)= =0A= > =0A= > ret =3D dma_map_sg(chan->device->dev, sgl, sport->dma_tx_nents,=0A= > DMA_TO_DEVICE);=0A= > - if (!ret) {=0A= > - dev_err(dev, "DMA mapping error for TX.\n");=0A= > + if (!ret)=0A= > return;=0A= > - }=0A= > =0A= > sport->dma_tx_desc =3D dmaengine_prep_slave_sg(chan, sgl,=0A= > ret, DMA_MEM_TO_DEV,=0A= > @@ -453,7 +450,6 @@ static void lpuart_dma_tx(struct lpuart_port *sport)= =0A= > if (!sport->dma_tx_desc) {=0A= > dma_unmap_sg(chan->device->dev, sgl, sport->dma_tx_nents,=0A= > DMA_TO_DEVICE);=0A= > - dev_err(dev, "Cannot prepare TX slave DMA!\n");=0A= > return;=0A= > }=0A= > =0A= > @@ -520,21 +516,12 @@ static int lpuart_dma_tx_request(struct uart_port *= port)=0A= > struct lpuart_port *sport =3D container_of(port,=0A= > struct lpuart_port, port);=0A= > struct dma_slave_config dma_tx_sconfig =3D {};=0A= > - int ret;=0A= > =0A= > dma_tx_sconfig.dst_addr =3D lpuart_dma_datareg_addr(sport);=0A= > dma_tx_sconfig.dst_addr_width =3D DMA_SLAVE_BUSWIDTH_1_BYTE;=0A= > dma_tx_sconfig.dst_maxburst =3D 1;=0A= > dma_tx_sconfig.direction =3D DMA_MEM_TO_DEV;=0A= > - ret =3D dmaengine_slave_config(sport->dma_tx_chan, &dma_tx_sconfig);=0A= > -=0A= > - if (ret) {=0A= > - dev_err(sport->port.dev,=0A= > - "DMA slave config failed, err =3D %d\n", ret);=0A= > - return ret;=0A= > - }=0A= > -=0A= > - return 0;=0A= > + return dmaengine_slave_config(sport->dma_tx_chan, &dma_tx_sconfig);=0A= > }=0A= > =0A= > static bool lpuart_is_32(struct lpuart_port *sport)=0A= > @@ -1074,8 +1061,8 @@ static void lpuart_copy_rx_to_tty(struct lpuart_por= t *sport)=0A= > =0A= > dmastat =3D dmaengine_tx_status(chan, sport->dma_rx_cookie, &state);= =0A= > if (dmastat =3D=3D DMA_ERROR) {=0A= > - dev_err(sport->port.dev, "Rx DMA transfer failed!\n");=0A= > spin_unlock_irqrestore(&sport->port.lock, flags);=0A= > + dev_err(sport->port.dev, "Rx DMA transfer failed!\n");=0A= > return;=0A= > }=0A= > =0A= > @@ -1179,23 +1166,17 @@ static inline int lpuart_start_rx_dma(struct lpua= rt_port *sport)=0A= > sg_init_one(&sport->rx_sgl, ring->buf, sport->rx_dma_rng_buf_len);=0A= > nent =3D dma_map_sg(chan->device->dev, &sport->rx_sgl, 1,=0A= > DMA_FROM_DEVICE);=0A= > -=0A= > - if (!nent) {=0A= > - dev_err(sport->port.dev, "DMA Rx mapping error\n");=0A= > + if (!nent)=0A= > return -EINVAL;=0A= > - }=0A= > =0A= > dma_rx_sconfig.src_addr =3D lpuart_dma_datareg_addr(sport);=0A= > dma_rx_sconfig.src_addr_width =3D DMA_SLAVE_BUSWIDTH_1_BYTE;=0A= > dma_rx_sconfig.src_maxburst =3D 1;=0A= > dma_rx_sconfig.direction =3D DMA_DEV_TO_MEM;=0A= > - ret =3D dmaengine_slave_config(chan, &dma_rx_sconfig);=0A= > =0A= > - if (ret < 0) {=0A= > - dev_err(sport->port.dev,=0A= > - "DMA Rx slave config failed, err =3D %d\n", ret);=0A= > + ret =3D dmaengine_slave_config(chan, &dma_rx_sconfig);=0A= > + if (ret < 0)=0A= > return ret;=0A= > - }=0A= > =0A= > sport->dma_rx_desc =3D dmaengine_prep_dma_cyclic(chan,=0A= > sg_dma_address(&sport->rx_sgl),=0A= > @@ -1203,10 +1184,8 @@ static inline int lpuart_start_rx_dma(struct lpuar= t_port *sport)=0A= > sport->rx_sgl.length / 2,=0A= > DMA_DEV_TO_MEM,=0A= > DMA_PREP_INTERRUPT);=0A= > - if (!sport->dma_rx_desc) {=0A= > - dev_err(sport->port.dev, "Cannot prepare cyclic DMA\n");=0A= > + if (!sport->dma_rx_desc)=0A= > return -EFAULT;=0A= > - }=0A= > =0A= > sport->dma_rx_desc->callback =3D lpuart_dma_rx_complete;=0A= > sport->dma_rx_desc->callback_param =3D sport;=0A= > =0A= =0A=