Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   "Alim Akhtar" <alim.akhtar@samsung.com>
To:     "'Avri Altman'" <Avri.Altman@wdc.com>, <robh+dt@kernel.org>,
        <devicetree@vger.kernel.org>, <linux-scsi@vger.kernel.org>
Cc:     <krzk@kernel.org>, <martin.petersen@oracle.com>,
        <kwmad.kim@samsung.com>, <stanley.chu@mediatek.com>,
        <cang@codeaurora.org>, <linux-samsung-soc@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
In-Reply-To: <SN6PR04MB46404847C78F62BA2D5CD2A0FCF30@SN6PR04MB4640.namprd04.prod.outlook.com>
Subject: RE: [PATCH v3 4/5] scsi: ufs-exynos: add UFS host support for
 Exynos SoCs
Date:   Wed, 25 Mar 2020 22:00:36 +0530
Message-ID: <000001d602c2$b9a15f80$2ce41e80$@samsung.com>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Thread-Index: AQG8Fm24XBW91IxNCpc3FyucYAw+uQGZ6IyRAhOVxEQCiTgOcqhboVgA
Content-Language: en-in
Content-Type: text/plain; charset="utf-8"
CMS-TYPE: 105P
References: <20200319150031.11024-1-alim.akhtar@samsung.com>
        <CGME20200319150710epcas5p11411da0ec2d56b403b80a206ce38a92b@epcas5p1.samsung.com>
        <20200319150031.11024-5-alim.akhtar@samsung.com>
        <SN6PR04MB46404847C78F62BA2D5CD2A0FCF30@SN6PR04MB4640.namprd04.prod.outlook.com>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Hi Avri
Thanks for review, see my comment inline below

> -----Original Message-----
> From: Avri Altman <Avri.Altman=40wdc.com>
> Sent: 22 March 2020 17:54
> To: Alim Akhtar <alim.akhtar=40samsung.com>; robh+dt=40kernel.org;
> devicetree=40vger.kernel.org; linux-scsi=40vger.kernel.org
> Cc: krzk=40kernel.org; martin.petersen=40oracle.com; kwmad.kim=40samsung.=
com;
> stanley.chu=40mediatek.com; cang=40codeaurora.org; linux-samsung-
> soc=40vger.kernel.org; linux-arm-kernel=40lists.infradead.org; linux-
> kernel=40vger.kernel.org
> Subject: RE: =5BPATCH v3 4/5=5D scsi: ufs-exynos: add UFS host support fo=
r Exynos
> SoCs
>=20
> > +static int exynos7_ufs_pre_link(struct exynos_ufs *ufs) =7B
> > +       struct ufs_hba *hba =3D ufs->hba;
> > +       u32 val =3D ufs->drv_data->uic_attr->pa_dbg_option_suite;
> Can pa_dbg_option_suite be replaced by a macro?
>=20
Going forward, I have plan to add multiple Samsung/Exynos SoC variants, whi=
ch will have its own drv_data. For that reason I kept it.
Let me have a relook on this.

> > +       exynos_ufs_disable_ov_tm(hba);
> > +
> > +       ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE_DYN),
> > 0xf);
> > +       ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE_DYN),
> > 0xf);
> A typo? Set PA_DBG_OPTION_SUITE_DYN twice?
>=20
Ack, will change

> > +=23define PWR_MODE_STR_LEN       64
> > +static int exynos_ufs_post_pwr_mode(struct ufs_hba *hba,
> > +                               struct ufs_pa_layer_attr *pwr_max,
> > +                               struct ufs_pa_layer_attr *pwr_req) =7B
> > +       struct exynos_ufs *ufs =3D ufshcd_get_variant(hba);
> > +       struct phy *generic_phy =3D ufs->phy;
> > +       struct uic_pwr_mode *pwr =3D &ufs->pwr_act;
> > +       char pwr_str=5BPWR_MODE_STR_LEN=5D =3D =22=22;
> Un-needed complication IMO - all those snprintf that is.
>=20
You mean pwr_str initialization is not needed here?

> > +
> > +static void exynos_ufs_fit_aggr_timeout(struct exynos_ufs *ufs) =7B
> > +       const u8 cntr_div =3D 40;
> Can be replaced by a macro?
>=20
Sure, will change.

> > +struct exynos_ufs_drv_data exynos_ufs_drvs =3D =7B
> > +
> > +       .compatible             =3D =22samsung,exynos7-ufs=22,
> > +       .uic_attr               =3D &exynos7_uic_attr,
> > +       .quirks                 =3D UFSHCD_QUIRK_PRDT_BYTE_GRAN =7C
> > +                                 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR =7C
> > +                                 UFSHCI_QUIRK_BROKEN_HCE =7C
> > +                                 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR,
> > +       .opts                   =3D EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL =7C
> > +                                 EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL =
=7C
> > +                                 EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
> In what way opts are different from quirks?
>=20
Similar to quirks, but only specific to controller local control, like rela=
ted to APB interface and clock control.
These doesn't need a change in common ufshcd core. So kept as opts.
Will fix your comments and submit v4 soon.
Thanks.
>=20
> Thanks,
> Avri