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[67.161.15.180]) by smtp.gmail.com with ESMTPSA id t60sm2053163pjb.9.2020.03.26.09.37.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Mar 2020 09:37:43 -0700 (PDT) Date: Thu, 26 Mar 2020 09:37:43 -0700 (PDT) X-Google-Original-Date: Thu, 26 Mar 2020 09:37:16 PDT (-0700) Subject: Re: [PATCH v7 08/13] pwm: sifive: Use 64-bit division macros for period and duty cycle In-Reply-To: <4212f82b8711b2b33f0e71142526d5a7575564e9.1583782035.git.gurus@codeaurora.org> CC: linux-pwm@vger.kernel.org, thierry.reding@gmail.com, uwe@kleine-koenig.org, subbaram@codeaurora.org, linux-kernel@vger.kernel.org, gurus@codeaurora.org, Paul Walmsley , linux-riscv@lists.infradead.org, yash.shah@sifive.com, Atish Patra From: Palmer Dabbelt To: gurus@codeaurora.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 09 Mar 2020 12:35:11 PDT (-0700), gurus@codeaurora.org wrote: > Because period and duty cycle are defined in the PWM framework structs > as ints with units of nanoseconds, the maximum time duration that can be > set is limited to ~2.147 seconds. Redefining them as u64 values will > enable larger time durations to be set. > > As a first step, prepare drivers to handle the switch to u64 period and > duty_cycle by replacing division operations involving pwm period and duty cycle > with their 64-bit equivalents as appropriate. The actual switch to u64 period > and duty_cycle follows as a separate patch. > > Where the dividend is 64-bit but the divisor is 32-bit, use *_ULL > macros: > - DIV_ROUND_UP_ULL > - DIV_ROUND_CLOSEST_ULL > - div_u64 > > Where the divisor is 64-bit (dividend may be 32-bit or 64-bit), use > DIV64_* macros: > - DIV64_U64_ROUND_CLOSEST > - div64_u64 > > Cc: Palmer Dabbelt > Cc: Paul Walmsley > Cc: linux-riscv@lists.infradead.org > Cc: Yash Shah > Cc: Atish Patra > > Signed-off-by: Guru Das Srinagesh > --- > drivers/pwm/pwm-sifive.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c > index cc63f9b..62de0bb 100644 > --- a/drivers/pwm/pwm-sifive.c > +++ b/drivers/pwm/pwm-sifive.c > @@ -181,7 +181,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, > * consecutively > */ > num = (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH); > - frac = DIV_ROUND_CLOSEST_ULL(num, state->period); > + frac = DIV64_U64_ROUND_CLOSEST(num, state->period); > /* The hardware cannot generate a 100% duty cycle */ > frac = min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); Acked-by: Palmer Dabbelt