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Subject: Re: [PATCH] drm/vc4: Fix HDMI mode validation
From:   Stefan Wahren <stefan.wahren@i2se.com>
To:     Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
        Eric Anholt <eric@anholt.net>,
        Daniel Vetter <daniel.vetter@ffwll.ch>
Cc:     maxime@cerno.tech, linux-rpi-kernel@lists.infradead.org,
        f.fainelli@gmail.com,
        Dave Stevenson <dave.stevenson@raspberrypi.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
References: <20200326122001.22215-1-nsaenzjulienne@suse.de>
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Message-ID: <f254992a-9155-5c89-03d0-f47faeb0d6d2@i2se.com>
Date:   Thu, 26 Mar 2020 18:21:16 +0100
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Am 26.03.20 um 18:19 schrieb Stefan Wahren:
> Am 26.03.20 um 13:20 schrieb Nicolas Saenz Julienne:
>> Current mode validation impedes setting up some video modes which should
>> be supported otherwise. Namely 1920x1200@60Hz.
>>
>> Fix this by lowering the minimum HDMI state machine clock to pixel clock
>> ratio allowed.
>>
>> Fixes: 32e823c63e90 ("drm/vc4: Reject HDMI modes with too high of clocks")
>> Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
>> Suggested-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
>> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
>> ---
>>  drivers/gpu/drm/vc4/vc4_hdmi.c | 20 ++++++++++++++++----
>>  1 file changed, 16 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
>> index cea18dc15f77..340719238753 100644
>> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
>> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
>> @@ -681,11 +681,23 @@ static enum drm_mode_status
>>  vc4_hdmi_encoder_mode_valid(struct drm_encoder *crtc,
>>  			    const struct drm_display_mode *mode)
>>  {
>> -	/* HSM clock must be 108% of the pixel clock.  Additionally,
>> -	 * the AXI clock needs to be at least 25% of pixel clock, but
>> -	 * HSM ends up being the limiting factor.
>> +	/*
>> +	 * As stated in RPi's vc4 firmware "HDMI state machine (HSM) clock must
>> +	 * be faster than pixel clock, infinitesimally faster, tested in
>> +	 * simulation. Otherwise, exact value is unimportant for HDMI
>> +	 * operation." This conflicts with bcm2835's vc4 documentation, which
>> +	 * states HSM's clock has to be at least 108% of the pixel clock.
>> +	 *
>> +	 * Real life tests reveal that vc4's firmware statement holds up, and
>> +	 * users are able to use pixel clocks closer to HSM's, namely for
>> +	 * 1920x1200@60Hz. So it was decided to have leave a 1% margin between
>> +	 * both clocks. Which, for RPi0-3 implies a maximum pixel clock of
> s/RPi0-3/bcm2835/ ?
>
> Beside this nit:
>
> Tested-by: Stefan Wahren <stefan.wahre@i2se.com>
>
> Thanks

Sorry typo in the mail address:

stefan.wahren@i2se.com