Received: by 2002:a25:6193:0:0:0:0:0 with SMTP id v141csp2290232ybb; Fri, 27 Mar 2020 02:45:11 -0700 (PDT) X-Google-Smtp-Source: ADFU+vuWoX5KL2MaRkye7ygVlL5BhAULESOCRDvEf3T7JlEYjUNvTWKUMg3YzJ95q4ml9U47DnId X-Received: by 2002:a9d:5607:: with SMTP id e7mr10128611oti.196.1585302311658; Fri, 27 Mar 2020 02:45:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1585302311; cv=none; d=google.com; s=arc-20160816; b=BiNfTBjJ9iYaX6FdtsC23gbzXQpPppvGe7PcEwn1eanxFVIsN+nWItUQbt+T86WgR5 Aqdz7gP+u+oFGJsKvUqwycklC/iPm2k60WPI45HOYl3fsCfSzeahCBp/iOYe78dVXyEY RFP4CPQizqWYAoGFdlQcQG1M8e/LfucsEJCoRxx8+1XRcp2S1OAkw0AmeCQMIc0jcVHK nbSKyvVEBQCENK+HXudxIbzxIIOP7VeAezIsOPWcfjohSTQMaAa2PJi0g2zjaK1llqpN tUpJvd+br+UvJUIlE2I881OXjntrtey3z5Wxm+0M1boT+nvpXTEwGlLcpEy7R3APuSwC 7dOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=QcA7NrVMFTbFUH25g7FOKPmlerLtA+0BxY4Gg8mj788=; b=Z6CGQBoTgwIQWgNdZDnLafjvDoTOO8tEJh+uB/yABAVqF1lT+S9/mQux6e4Ir5fNWm UJFq3/nH5NRjNvquxzd0xsbA/akCnnIMf0ms6G7CqxtvzP/SawIlFojQghvLJ1uhFULG Oqn3pSecEdJCBXbV1bHVw06HUftoka9klOGOWLw7AQpRIleV/QkKQURg6XijOsEzQJrA wNXbz69DFEa+ih6USphPUR+TOkNQFE6dGAJXg6TqTe/Uq84opaF3DdRSELs1oLh7SVoJ vjv7rG1fy2uDmXbrS1MKF4OqshOusqRGAd+WM224+GxkH5TGtTomGbVvsSIPCqc2kxVx gemQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 194si2117115oii.2.2020.03.27.02.44.59; Fri, 27 Mar 2020 02:45:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727701AbgC0Job (ORCPT + 99 others); Fri, 27 Mar 2020 05:44:31 -0400 Received: from alexa-out-blr-01.qualcomm.com ([103.229.18.197]:55216 "EHLO alexa-out-blr-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726804AbgC0Jo2 (ORCPT ); Fri, 27 Mar 2020 05:44:28 -0400 Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by alexa-out-blr-01.qualcomm.com with ESMTP/TLS/AES256-SHA; 27 Mar 2020 15:14:18 +0530 Received: from c-sanm-linux.qualcomm.com ([10.206.25.31]) by ironmsg01-blr.qualcomm.com with ESMTP; 27 Mar 2020 15:13:51 +0530 Received: by c-sanm-linux.qualcomm.com (Postfix, from userid 2343233) id DC4772223; Fri, 27 Mar 2020 15:13:50 +0530 (IST) From: Sandeep Maheswaram To: Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Rob Herring , Mark Rutland , Felipe Balbi , Stephen Boyd , Doug Anderson , Matthias Kaehlcke Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manu Gautam , Chandana Kishori Chiluveru , Sandeep Maheswaram Subject: [PATCH v6 0/4] ADD interconnect support for Qualcomm DWC3 driver Date: Fri, 27 Mar 2020 15:13:19 +0530 Message-Id: <1585302203-11008-1-git-send-email-sanm@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This path series aims to add interconnect support in dwc3-qcom driver on SDM845 and SC7180 SoCs. Changes from v5 -> v6 > [PATCH 1/4] Addressed comments from Rob. > [PATCH 2/4] Fixed review comments from Matthias in DWC3 driver. > [PATCH 3/4] Ignoring 80 char limit in defining interconnect paths. > Added [PATCH 4/4] in this series. Adding interconnect nodes for SC7180. Depends on patch https://patchwork.kernel.org/patch/11417989/. Changes from v4 -> v5 > [PATCH 1/3] Added the interconnect properties in yaml. This patch depends on series https://patchwork.kernel.org/cover/11372641/. > [PATCH 2/3] Fixed review comments from Matthias in DWC3 driver. > [PATCH 3/3] Modified as per the new interconnect nodes in sdm845. Depends on series https://patchwork.kernel.org/cover/11372211/. Changes from v3 -> v4 > Fixed review comments from Matthias > [PATCH 1/3] and [PATCH 3/3] remains unchanged Changes from v2 -> v3 > Fixed review comments from Matthias and Manu > changed the functions prefix from usb_* to dwc3_qcom_* Changes since V1: > Comments by Georgi Djakov on "[PATCH 2/3]" addressed > [PATCH 1/3] and [PATCH 3/3] remains unchanged Sandeep Maheswaram (4): dt-bindings: usb: qcom,dwc3: Introduce interconnect properties for Qualcomm DWC3 driver usb: dwc3: qcom: Add interconnect support in dwc3 driver arm64: dts: qcom: sdm845: Add interconnect properties for USB arm64: dts: qcom: sc7180: Add interconnect properties for USB .../devicetree/bindings/usb/qcom,dwc3.yaml | 8 ++ arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 + arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++ drivers/usb/dwc3/dwc3-qcom.c | 128 ++++++++++++++++++++- 4 files changed, 146 insertions(+), 2 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation