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Date: Sat, 20 Oct 2001 13:42:58 -0400 (EDT)
From: Mark Hahn <hahn@physics.mcmaster.ca>
To: Krzysztof Oledzki <ole@ans.pl>
cc: linux-kernel@vger.kernel.org
Subject: Re: bug in "raid5: measuring checksumming speed"
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> on my two P3 boxes linux chooses pIII_sse but pII_mmx and p5_mmx are
> reported as faster instructions:

tail of linux/include/asm-i386/xor.h:

| /* We force the use of the SSE xor block because it can write around L2.
|    We may also be able to load into the L1 only depending on how the cpu
|    deals with a load to a line that is being prefetched.  */
| #define XOR_SELECT_TEMPLATE(FASTEST) \
|         (cpu_has_xmm ? &xor_block_pIII_sse : FASTEST)

this code should probably be generalized to test for K7 feature flags, as well.


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