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Date:   Sat, 28 Mar 2020 17:31:32 +0000
From:   Jonathan Cameron <jic23@kernel.org>
To:     <Eugen.Hristev@microchip.com>
Cc:     <linux-iio@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <Ludovic.Desroches@microchip.com>,
        <alexandru.ardelean@analog.com>
Subject: Re: [PATCH v3 1/3] iio: adc: at91-sama5d2_adc: fix differential
 channels in triggered mode
Message-ID: <20200328173132.25f7e1d8@archlinux>
In-Reply-To: <5c0829d6-3b8d-0efc-0ffc-042727cb9115@microchip.com>
References: <1580216189-27418-1-git-send-email-eugen.hristev@microchip.com>
        <1580216189-27418-2-git-send-email-eugen.hristev@microchip.com>
        <20200202110206.7326ce4d@archlinux>
        <5c0829d6-3b8d-0efc-0ffc-042727cb9115@microchip.com>
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On Mon, 23 Mar 2020 10:42:19 +0000
<Eugen.Hristev@microchip.com> wrote:

> On 02.02.2020 13:02, Jonathan Cameron wrote:
> > On Tue, 28 Jan 2020 12:57:39 +0000
> > <Eugen.Hristev@microchip.com> wrote:
> >   
> >> From: Eugen Hristev <eugen.hristev@microchip.com>
> >>
> >> The differential channels require writing the channel offset register (COR).
> >> Otherwise they do not work in differential mode.
> >> The configuration of COR is missing in triggered mode.
> >>
> >> Fixes: 5e1a1da0f8c9 ("iio: adc: at91-sama5d2_adc: add hw trigger and buffer support")
> >> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>  
> > Applied to the fixes-togreg branch of iio.git.  Normally I avoid rebasing that
> > branch but I may do so this time given it's currently mid merge window.
> > 
> > The other two patches will have to wait for this one to get upstream of
> > my togreg branch which will take a few weeks.
> > 
> > Please give me a poke if I seem to have forgotten about them!
> >   
> 
> Poke !
Timings have gone badly this cycle I'm afraid, so whilst it's made it
into staging/staging-next, I'm not going to be rebasing togreg
until after a pull request to Greg KH.  The timing issue was
I didn't get one out before staging most likely closed (one week
ahead of the window opening which it will probably do tomorrow).

So this will have to wait at least a few weeks more.

Sorry for the delay.

Jonathan

> 
> Eugen
> 
> > Thanks,
> > 
> > Jonathan
> >   
> >> ---
> >> Changes in v2:
> >> - moved to the start of the list
> >>
> >>   drivers/iio/adc/at91-sama5d2_adc.c | 15 +++++++++++++++
> >>   1 file changed, 15 insertions(+)
> >>
> >> diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
> >> index e1850f3..2a6950a 100644
> >> --- a/drivers/iio/adc/at91-sama5d2_adc.c
> >> +++ b/drivers/iio/adc/at91-sama5d2_adc.c
> >> @@ -723,6 +723,7 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
> >>
> >>        for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) {
> >>                struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit);
> >> +             u32 cor;
> >>
> >>                if (!chan)
> >>                        continue;
> >> @@ -732,6 +733,20 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
> >>                        continue;
> >>
> >>                if (state) {
> >> +                     cor = at91_adc_readl(st, AT91_SAMA5D2_COR);
> >> +
> >> +                     if (chan->differential)
> >> +                             cor |= (BIT(chan->channel) |
> >> +                                     BIT(chan->channel2)) <<
> >> +                                     AT91_SAMA5D2_COR_DIFF_OFFSET;
> >> +                     else
> >> +                             cor &= ~(BIT(chan->channel) <<
> >> +                                    AT91_SAMA5D2_COR_DIFF_OFFSET);
> >> +
> >> +                     at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
> >> +             }
> >> +
> >> +             if (state) {
> >>                        at91_adc_writel(st, AT91_SAMA5D2_CHER,
> >>                                        BIT(chan->channel));
> >>                        /* enable irq only if not using DMA */  
> >   
>