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Subject: Re: [03/12] bus: stm32-fmc2-ebi: add STM32 FMC2 EBI controller driver
To:     Marek Vasut <marex@denx.de>, <miquel.raynal@bootlin.com>,
        <richard@nod.at>, <vigneshr@ti.com>, <lee.jones@linaro.org>,
        <robh+dt@kernel.org>, <mark.rutland@arm.com>, <tony@atomide.com>
CC:     <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
        <linux-stm32@st-md-mailman.stormreply.com>
References: <1584975532-8038-1-git-send-email-christophe.kerello@st.com>
 <1584975532-8038-4-git-send-email-christophe.kerello@st.com>
 <f6a2c766-8ae5-fab7-e2f6-db23f39b5d91@denx.de>
From:   Christophe Kerello <christophe.kerello@st.com>
Message-ID: <93fce520-9269-123c-9523-173e75cdce2e@st.com>
Date:   Mon, 30 Mar 2020 11:19:55 +0200
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On 3/30/20 3:24 AM, Marek Vasut wrote:
> On 3/23/20 3:58 PM, Christophe Kerello wrote:
>> The driver adds the support for the STMicroelectronics FMC2 EBI controller
>> found on STM32MP SOCs.
>>
> 
> On DH STM32MP1 SoM in PDK2 carrier board,
> Tested-by: Marek Vasut <marex@denx.de>
> 
> btw. it seems this sets BTRx DATLAT and CLKDIV to 0xf , it's "Don't
> care" in the datasheet for Muxed mode, but then it should probably be
> set to 0.

Hi Marek,

Thanks for testing.

These 2 bit fields (BTRx DATLAT and CLKDIV) are only needed for 
synchronous transactions. Based on your bindings, the transaction type 
is asynchronous.
CLKDIV bit fields should not be set to 0x0, as this value is reserved 
for this bit field. The driver keeps the reset value when it is not 
needed to update a bit field.

Regards,
Christophe Kerello.

> 
> The bindings I used are below:
> 
> &fmc {
>          pinctrl-names = "default", "sleep";
>          pinctrl-0 = <&fmc_pins_b>;
>          pinctrl-1 = <&fmc_sleep_pins_b>;
>          status = "okay";
>          #address-cells = <1>;
>          #size-cells = <1>;
>          /delete-property/interrupts;
>          /delete-property/dmas;
>          /delete-property/dma-names;
>          reg = <0x58002000 0x1000>;
>          ranges;
> 
>          ebi {
>                  #address-cells = <2>;
>                  #size-cells = <1>;
>                  compatible = "st,stm32mp1-fmc2-ebi";
>                  ranges = <0 0 0x60000000 0x4000000>,
>                           <1 0 0x64000000 0x4000000>,
>                           <2 0 0x68000000 0x4000000>,
>                           <3 0 0x6c000000 0x4000000>;
> 
>                  ksz8851: ks8851mll@0,0 {
>                          compatible = "micrel,ks8851-mll";
>                          reg = <1 0x0 0x2 1 0x2 0x20000>;
>                          interrupt-parent = <&gpioc>;
>                          interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
>                          bank-width = <2>;
> 
>                          /* Timing values are in nS */
>                          st,fmc2_ebi_cs_mux_enable;
>                          st,fmc2_ebi_cs_transaction_type = <4>;
>                          st,fmc2_ebi_cs_buswidth = <16>;
>                          st,fmc2_ebi_cs_address_setup = <6>;
>                          st,fmc2_ebi_cs_address_hold = <6>;
>                          st,fmc2_ebi_cs_data_setup = <127>;
>                          st,fmc2_ebi_cs_bus_turnaround = <9>;
>                          st,fmc2_ebi_cs_data_hold = <9>;
>                  };
> 
>                  sram@3,0 {
>                          compatible = "mtd-ram";
>                          reg = <3 0x0 0x80000>;
>                          bank-width = <2>;
> 
>                          /* Timing values are in nS */
>                          st,fmc2_ebi_cs_mux_enable;
>                          st,fmc2_ebi_cs_transaction_type = <4>;
>                          st,fmc2_ebi_cs_buswidth = <16>;
>                          st,fmc2_ebi_cs_address_setup = <6>;
>                          st,fmc2_ebi_cs_address_hold = <6>;
>                          st,fmc2_ebi_cs_data_setup = <127>;
>                          st,fmc2_ebi_cs_bus_turnaround = <9>;
>                          st,fmc2_ebi_cs_data_hold = <9>;
>                  };
>          };
> };
>