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[2003:f1:3710:ed00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id v186sm1392953wme.24.2020.03.30.16.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Mar 2020 16:45:47 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, jbrunet@baylibre.com, narmstrong@baylibre.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 0/2] clk: meson8b: allow the HDMI driver to manage "hdmi_sys" Date: Tue, 31 Mar 2020 01:45:33 +0200 Message-Id: <20200330234535.3327513-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The "hdmi_sys" clock is driving the HDMI TX controller. The controller's IP seems to use this clock for example to derived the DDC clock. Testing has shown that we can disable this clock without locking up the system (as long as we don't read the HDMI TX registers while this clock is disabled - this can't happen as we don't have a driver yet and once we have one that driver will enable this clock). Martin Blumenstingl (2): clk: meson8b: export the HDMI system clock clk: meson: meson8b: make the hdmi_sys clock tree mutable drivers/clk/meson/meson8b.c | 6 +++--- drivers/clk/meson/meson8b.h | 1 - include/dt-bindings/clock/meson8b-clkc.h | 1 + 3 files changed, 4 insertions(+), 4 deletions(-) -- 2.26.0