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Lu" To: Richard Cochran CC: "linux-kernel@vger.kernel.org" , "netdev@vger.kernel.org" , "David S . Miller" , Vladimir Oltean , Claudiu Manoil , Andrew Lunn , Vivien Didelot , Florian Fainelli , Alexandre Belloni , Microchip Linux Driver Support Subject: RE: [PATCH 6/6] ptp_ocelot: support 4 programmable pins Thread-Topic: [PATCH 6/6] ptp_ocelot: support 4 programmable pins Thread-Index: AQHV/qQWBIiKj5A/T0WD8BjMeGVxRqhXvRSAgADnAvCAALTjgIABSqMQgABMsoCAAQih4IAGMAqA Date: Tue, 31 Mar 2020 04:18:10 +0000 Message-ID: References: <20200320103726.32559-1-yangbo.lu@nxp.com> <20200320103726.32559-7-yangbo.lu@nxp.com> <20200324130733.GA18149@localhost> <20200325134147.GB32284@localhost> <20200326135941.GA20841@localhost> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-originating-ip: [92.121.68.129] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 5523aa37-8719-4672-5d09-08d7d52a85f1 x-ms-traffictypediagnostic: AM7PR04MB6950:|AM7PR04MB6950: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8273; x-forefront-prvs: 0359162B6D x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM7PR04MB6885.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(10009020)(4636009)(346002)(376002)(136003)(39860400002)(396003)(366004)(2906002)(76116006)(81166006)(478600001)(66476007)(81156014)(8936002)(71200400001)(53546011)(66446008)(6506007)(64756008)(8676002)(66946007)(66556008)(5660300002)(4326008)(316002)(33656002)(7696005)(26005)(9686003)(86362001)(186003)(54906003)(55016002)(6916009)(52536014);DIR:OUT;SFP:1101; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: dvZ2eo95KjSL4WHcRJZzvlNNoSXE8HhaesORVq4f5XoPpFonTPWy4jxFBkCAVUCgau+xsETdi6Y8OLevqXHcL/mGdglJrFykFONKQTAGyIgxNB0X0VEEwOiMVVwf9nm6OOjA8BKJsblY1rRfzmef5FM2o8f6lvF0iLV4Jy36X4y4vkfbqHk4QHyAOoBamZYUMZbuWEz6XPM8o4BvewBt/hGiqbKx9BB2MwPI4i7QAcy/0PSoqY6QqWbNRcf/pB0wUNom9PUCMLc4ht59vKAEJoFfku6/W+aEowf8Q8FdSPblMOzdEXoA6DdR2aKmrCQcYujxSSI45bs8Bokt2uq4ViHcNj/iiQ0LWEHFUqsLXZ+D2ZSfNR0rWu2oFK2YkVTI0JUqCMpOrZwpXNtwUhavNlWilAgDqn17O6KRlcD0zfLhrJlqGp0A8YxzUo+TYVIy x-ms-exchange-antispam-messagedata: gViaHSFnWhCHkEEbhIuKURNmeNC6aVzQkPBpkeRPyZqNzxd+imNieZkkIbXJVOCAp2H0t2G9b0DWu0yIZvw/b8XR1MgugJP5N5WOkaW6xU52+lIBkNrWBnqzji7IcylFSElFdAYRSc3SaYeCfq1A8Q== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5523aa37-8719-4672-5d09-08d7d52a85f1 X-MS-Exchange-CrossTenant-originalarrivaltime: 31 Mar 2020 04:18:10.8316 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: NMF09aeo9RGUHen8HLbJGzxoAFpAqkXLoyNeSeLRP80dAPunAF2kNW/1f/onx+y+nAnMU9eBD9MqFeIkrRMtqw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR04MB6950 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Y.b. Lu > Sent: Friday, March 27, 2020 1:48 PM > To: Richard Cochran > Cc: linux-kernel@vger.kernel.org; netdev@vger.kernel.org; David S . Mille= r > ; Vladimir Oltean ; > Claudiu Manoil ; Andrew Lunn ; > Vivien Didelot ; Florian Fainelli > ; Alexandre Belloni = ; > Microchip Linux Driver Support > Subject: RE: [PATCH 6/6] ptp_ocelot: support 4 programmable pins >=20 > > -----Original Message----- > > From: Richard Cochran > > Sent: Thursday, March 26, 2020 10:00 PM > > To: Y.b. Lu > > Cc: linux-kernel@vger.kernel.org; netdev@vger.kernel.org; David S . Mil= ler > > ; Vladimir Oltean ; > > Claudiu Manoil ; Andrew Lunn > ; > > Vivien Didelot ; Florian Fainelli > > ; Alexandre Belloni ; > > Microchip Linux Driver Support > > Subject: Re: [PATCH 6/6] ptp_ocelot: support 4 programmable pins > > > > On Thu, Mar 26, 2020 at 09:34:52AM +0000, Y.b. Lu wrote: > > > > Of course, that is horrible, and I am going to find a way to fix it= . > > > > > > Thanks a lot. > > > Do you think it is ok to move protection into ptp_set_pinfunc() to pr= otect > > just pin_config accessing? > > > ptp_disable_pinfunc() not touching pin_config could be out of protect= ion. > > > But it seems indeed total ptp_set_pinfunc() should be under protectio= n... > > > > Yes, and I have way to fix that. I will post a patch soon... > > > > > I could modify commit messages to indicate the pin supports both > > PTP_PF_PEROUT and PTP_PF_EXTTS, and PTP_PF_EXTTS support will be > added > > in the future. > > > > Thanks for explaining. Since you do have programmable pin, please > > wait for my patch to fix the deadlock. >=20 > Thanks a lot. Will wait your fix-up. I see the fix-up was merged. Thanks Richard. 62582a7 ptp: Avoid deadlocks in the programmable pin code. I just sent out v2 patch-set based on that:) >=20 > Best regards, > Yangbo Lu >=20 > > > > Thanks, > > Richard