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From:   Eric Lin <tesheng@andestech.com>
To:     <linux-riscv@lists.infradead.org>
CC:     <linux-kernel@vger.kernel.org>, <paul.walmsley@sifive.com>,
        <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
        <green.hu@gmail.com>, <Anup.Patel@wdc.com>,
        <akpm@linux-foundation.org>, <logang@deltatee.com>,
        <david.abdurachmanov@gmail.com>, <atish.patra@wdc.com>,
        <tglx@linutronix.de>, <bp@suse.de>, <yash.shah@sifive.com>,
        <alex@ghiti.fr>, <zong.li@sifive.com>, <gary@garyguo.net>,
        <rppt@linux.ibm.com>, <steven.price@arm.com>,
        Eric Lin <tesheng@andestech.com>
Subject: [PATCH 0/3] Highmem support for 32-bit RISC-V
Date:   Tue, 31 Mar 2020 17:32:38 +0800
Message-ID: <20200331093241.3728-1-tesheng@andestech.com>
MIME-Version: 1.0
Content-Type: text/plain
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

With Highmem support, the kernel can map more than 1GB physical memory.

This patchset implements Highmem for RV32, referencing to mostly nds32
and others like arm and mips, and it has been tested on Andes A25MP platform.

Eric Lin (3):
  riscv/mm: Add pkmap region and CONFIG_HIGHMEM
  riscv/mm: Implement kmap() and kmap_atomic()
  riscv/mm: Add pkmap in print_vm_layout()

 arch/riscv/Kconfig               | 18 +++++++
 arch/riscv/include/asm/fixmap.h  |  9 +++-
 arch/riscv/include/asm/highmem.h | 49 +++++++++++++++++
 arch/riscv/include/asm/pgtable.h | 27 ++++++++++
 arch/riscv/mm/Makefile           |  1 +
 arch/riscv/mm/highmem.c          | 74 +++++++++++++++++++++++++
 arch/riscv/mm/init.c             | 92 ++++++++++++++++++++++++++++++--
 7 files changed, 266 insertions(+), 4 deletions(-)
 create mode 100644 arch/riscv/include/asm/highmem.h
 create mode 100644 arch/riscv/mm/highmem.c

-- 
2.17.0