Received: by 2002:a25:6193:0:0:0:0:0 with SMTP id v141csp3641377ybb; Tue, 31 Mar 2020 09:08:21 -0700 (PDT) X-Google-Smtp-Source: ADFU+vs471+h1v4kPxgSLgF7l3hsZ+ewRhgiQ9jyG1y5tdaQcFdv7I0FOFNxc0JjHrnB0s4d+o3P X-Received: by 2002:a9d:6d04:: with SMTP id o4mr9631703otp.101.1585670901021; Tue, 31 Mar 2020 09:08:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1585670901; cv=none; d=google.com; s=arc-20160816; b=Ot+BInjZfnkauPjBNW3+4LWbQ1uOlXrNUb0IKe2gqhZr6MYCvXWZaLHthNletOykX+ IXIJKkXupPz6gax8iUNSUKhKXjQL19QcCtmUS32f/wW69p3129vSo+tsuT/WsuKFnxWL QUpAdDKWgkGesa7W2loneTE/Ck2qYDjUaUBfxQg1uO06UT4+ziw8foo+9QAlOlWTzQZF T4JvwN8eVR5GK6GuRrR3FBqPWx/85Cp1PjxFrsf09VZLdzVoyYmwv7G9dnjMdFK2zD42 jFBEkLa5ROb458Iee05Nbi0gaZEEN4VkKynuC4jzrMo14HZxZe3aHNe6IJdYbDBVhIhO dBdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature; bh=4VKI9AuPhMvUgqTj7z2yAveanc53o7XusIgD/wUX0qM=; b=iGrWMBXgDFKArMYGZjqm89rH8bmTq6biy85hM+t/5Cv5wC7pHLwEWSUuKr32LUZ/vJ JFXie9UbjJuxORapHgC54NAWaRvJ8yq8ffooa/s+BVyd4D73NnkFC3mNpZ6RE1caYYXy ON4TVuBgyAOwWtklqYxHCbhi6/YyEKwxxwtIlViMno9kqObe56F+td+gPyZRTMcKGIiJ qraSwlvtF7gynUhhgKp9Cfm6W2qh5QiFjuzgI74Sz+2qHc8dZOKH17YoPy+4iiIekpQq rr3Qmfns3Qs9LL/N/xMowZ71vVmcNBt4GSXxXKD3bx/Um3RrhQHPVJLWf4hYhsGNc/kx c5Eg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=q0agAYmm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e26si7773631oos.76.2020.03.31.09.07.49; Tue, 31 Mar 2020 09:08:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=q0agAYmm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731409AbgCaQE7 (ORCPT + 99 others); Tue, 31 Mar 2020 12:04:59 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:38291 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730562AbgCaQE7 (ORCPT ); Tue, 31 Mar 2020 12:04:59 -0400 Received: by mail-wm1-f67.google.com with SMTP id f6so3383048wmj.3; Tue, 31 Mar 2020 09:04:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=4VKI9AuPhMvUgqTj7z2yAveanc53o7XusIgD/wUX0qM=; b=q0agAYmm/VmDdDcewOukFSDP029eE+dPAyRe1UJebG980+mCCXFDfpDZYsJGXffTI9 by1tNoD5G+i/Ffh4pvhmWX3TLLoAMEzIL0+NsQ/Q3ngv8BdhSX5kl5sX/ldWDTuEITlf 4CfG/ggwB2NZs56lKww74VrGuLbMtYMZR5wmzOaipMmiozrTIBjFgLAaueoy7F4JYT9l pR+UOHuggwL6Zq3a6PHNYd6Ty+JXTKndlizKODM4acD6ZV1+Agcxn1jadBN0WycrsLqH NtNIirApMeePMh0wQNM4RLnxVBzfURMBSPQ25wes250TigM7rSn830EOpLFZKsTr+BHQ gDWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=4VKI9AuPhMvUgqTj7z2yAveanc53o7XusIgD/wUX0qM=; b=p8KlvI7Lsv2DWz+7APdcCrQh4DDlbYNiHjGHCABK8YlUgebBEfO0sIMxp6nJWsTDYb oNYc9h/CvuZJybjoUAujBIiOMgM2hg+V+x6noW3PI05W3sEv6b3ROMztdlSmgR/AlNk7 ji/0Po0Ysz1BWLs4NbF76s65z5ndUBKfHVCUJOCR7AlFMFEhKP9QPN/8fbh4njQRyK8V 4DwjzX/B2LYcBFwX23nG7rKPb6j1V/p34a/iLMEV+vVxAJ5wTaLhFEKTxEVtVqclsDaN VJBznEO5RnM6mqgyUEwURrr9BQ9CXEIsStUNB98t+zE3EXN1qrKn1UoUm2dFLSaKgv9J H1Mg== X-Gm-Message-State: ANhLgQ34RFYe8RrYxOhUSIf0RjM/PjgOEoBe7Bgnq2RkCrcm1Ew+cihU JbjgMpvaApdfdaO6r9pAucM= X-Received: by 2002:a1c:4987:: with SMTP id w129mr4406106wma.168.1585670696219; Tue, 31 Mar 2020 09:04:56 -0700 (PDT) Received: from debian.home (ip51ccf9cd.speed.planet.nl. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id p17sm1651433wmb.30.2020.03.31.09.04.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Mar 2020 09:04:55 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: hjc@rock-chips.com, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1] dt-bindings: display: convert rockchip rk3066 hdmi bindings to yaml Date: Tue, 31 Mar 2020 18:04:48 +0200 Message-Id: <20200331160448.15331-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Current dts files with 'hdmi' nodes for rk3066 are manually verified. In order to automate this process rockchip,rk3066-hdmi.txt has to be converted to yaml. Signed-off-by: Johan Jonker --- .../display/rockchip/rockchip,rk3066-hdmi.txt | 72 ----------- .../display/rockchip/rockchip,rk3066-hdmi.yaml | 141 +++++++++++++++++++++ 2 files changed, 141 insertions(+), 72 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt deleted file mode 100644 index d1ad31bca..000000000 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt +++ /dev/null @@ -1,72 +0,0 @@ -Rockchip specific extensions for rk3066 HDMI -============================================ - -Required properties: -- compatible: - "rockchip,rk3066-hdmi"; -- reg: - Physical base address and length of the controller's registers. -- clocks, clock-names: - Phandle to HDMI controller clock, name should be "hclk". -- interrupts: - HDMI interrupt number. -- power-domains: - Phandle to the RK3066_PD_VIO power domain. -- rockchip,grf: - This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. -- ports: - Contains one port node with two endpoints, numbered 0 and 1, - connected respectively to vop0 and vop1. - Contains one port node with one endpoint - connected to a hdmi-connector node. -- pinctrl-0, pinctrl-name: - Switch the iomux for the HPD/I2C pins to HDMI function. - -Example: - hdmi: hdmi@10116000 { - compatible = "rockchip,rk3066-hdmi"; - reg = <0x10116000 0x2000>; - interrupts = ; - clocks = <&cru HCLK_HDMI>; - clock-names = "hclk"; - power-domains = <&power RK3066_PD_VIO>; - rockchip,grf = <&grf>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - hdmi_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - hdmi_in_vop0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vop0_out_hdmi>; - }; - hdmi_in_vop1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vop1_out_hdmi>; - }; - }; - hdmi_out: port@1 { - reg = <1>; - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; - }; - }; - }; - -&pinctrl { - hdmi { - hdmi_hpd: hdmi-hpd { - rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; - }; - hdmii2c_xfer: hdmii2c-xfer { - rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, - <0 RK_PA2 1 &pcfg_pull_none>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml new file mode 100644 index 000000000..8f4acf707 --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip rk3066 HDMI controller + +maintainers: + - Sandy Huang + - Heiko Stuebner + +properties: + compatible: + const: rockchip,rk3066-hdmi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: hclk + + pinctrl-0: + maxItems: 2 + + pinctrl-names: + const: default + description: + Switch the iomux for the HPD/I2C pins to HDMI function. + + power-domains: + maxItems: 1 + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: + Port node with two endpoints, numbered 0 and 1, + connected respectively to vop0 and vop1. + + port@1: + type: object + description: + Port node with one endpoint connected to a hdmi-connector node. + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - pinctrl-0 + - pinctrl-names + - power-domains + - rockchip,grf + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + hdmi: hdmi@10116000 { + compatible = "rockchip,rk3066-hdmi"; + reg = <0x10116000 0x2000>; + interrupts = ; + clocks = <&cru HCLK_HDMI>; + clock-names = "hclk"; + pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; + pinctrl-names = "default"; + power-domains = <&power RK3066_PD_VIO>; + rockchip,grf = <&grf>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + hdmi_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + hdmi_in_vop0: endpoint@0 { + reg = <0>; + remote-endpoint = <&vop0_out_hdmi>; + }; + hdmi_in_vop1: endpoint@1 { + reg = <1>; + remote-endpoint = <&vop1_out_hdmi>; + }; + }; + hdmi_out: port@1 { + reg = <1>; + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; + }; + }; + }; + + pinctrl { + hdmi { + hdmi_hpd: hdmi-hpd { + rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; + }; + hdmii2c_xfer: hdmii2c-xfer { + rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, + <0 RK_PA2 1 &pcfg_pull_none>; + }; + }; + }; -- 2.11.0